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Lead Design Engineer

Cadence Design Systems
October 20, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Physical Design Jobs, Level - Senior

Job Title

Lead Design Engineer

Role Summary

The Lead Design Engineer performs hands-on implementation and sign-off activities across synthesis, logical equivalence checking (LEC), CLP, and UPF/CPF-based power-intent flows for advanced ASIC/SoC blocks. This is an execution-focused role with growing ownership: debugging synthesis and LEC issues, contributing to CLP closure, and authoring constraints and ECO scripts.

Works closely with PD, DFT, and RTL teams to resolve cross-functional issues and provides clear status and technical summaries.

Experience Level

Senior - 4–7 years of hands-on experience in ASIC synthesis, LEC, and/or low-power verification flows.

Responsibilities

Accountable for synthesis/LEC/CLP execution, closure activities, and clear documentation of issues and progress.

  • Run and debug LEC sign-off for design blocks; investigate and resolve NEQs and constraint mismatches.
  • Execute and debug Cadence Genus synthesis runs to improve QoR and resolve SDC/constraint issues.
  • Support CLP flows and contribute to CLP sign-off activities.
  • Write and maintain ECO scripts and timing/power constraints for assigned blocks.
  • Independently triage and document issues; escalate complex or systemic problems as needed.
  • Collaborate with PD, DFT, and RTL teams on cross-functional issues affecting synthesis/LEC/CLP closure.
  • Prepare concise status updates and technical summaries for internal tracking.

Requirements

Must-have technical skills and experience for immediate contribution.

  • 4–7 years of hands-on experience in ASIC synthesis, LEC, and/or low-power verification flows.
  • Working knowledge of Cadence Genus and Conformal (LEC and/or CLP).
  • Familiarity with UPF/CPF-based power intent (IEEE 1801).
  • Scripting proficiency in Tcl, Perl, or Python and comfort in Unix/Linux environments.
  • Solid understanding of digital design fundamentals, STA basics, and low-power architecture concepts.
  • Strong verbal and written communication skills and ability to work independently on assigned blocks.

Education Requirements

Not specified.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-10-16