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Lead Design Engineer

Cadence Design Systems
July 01, 2026
Full-time
On-site
Seoul, Gyeonggi-do, South Korea
Physical Design Jobs, Level - Senior

Job Title

Lead Design Engineer

Role Summary

Senior physical design engineer responsible for implementing ASIC/SoC physical designs and leading implementation projects in Cadence Korea. Work spans floorplanning, place-and-route, signoff, verification, and methodology/flow development for advanced process nodes.

You'll lead or participate in next-generation physical design flows, collaborate with RTL teams to achieve successful tapeouts, and drive technical solutions for low-power and high-speed designs.

Experience Level

Senior β€” typically 9+ years of relevant ASIC physical design experience (as stated in the posting).

Responsibilities

Primary duties include hands-on implementation, signoff, and technical leadership on physical design projects.

  • Perform floorplanning, power-grid design, placement, and routing.
  • Clock tree synthesis and timing closure; static timing analysis and skew/duty-cycle adjustments.
  • Power and signal integrity analysis, including EM/IR and crosstalk analysis.
  • Physical verification (DRC/LVS), antenna checks, and DFM closure.
  • EM/IR signoff and related signoff tasks for tapeout readiness.
  • Participate in or lead development of physical-design methodology and flows.
  • Collaborate with RTL designers and cross-functional teams to resolve implementation issues.
  • Verify, test, and characterize designs; take technical ownership of deliverables.

Requirements

Must-have technical skills, working style, and communication expectations.

  • 9+ years' experience with ASIC design flow and hierarchical physical-design strategies.
  • Proven hands-on experience with P&R flows, floorplanning, CTS, and timing closure.
  • Strong knowledge of low-power design techniques and DFT principles.
  • Experience with static timing analysis, skew balancing, and duty-cycle adjustment.
  • Experience in power/signal integrity, EM/IR analysis, and crosstalk mitigation.
  • Experience with physical verification (DRC/LVS), antenna rules, and DFM practices.
  • Ability to work independently, take ownership, and function as a team player; good English communication skills.
  • Experience working closely with RTL teams to achieve tapeout-quality designs.

Education Requirements

Not specified.


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-06-30