Lead Design Engineer
Cadence Design SystemsRole Summary
The Lead Design Engineer will work within the Cadence Memory IP Group, responsible for developing firmware for various memory interfaces and collaborating with hardware designers and verification teams.
Experience Level
Mid-level, with 4-6 years of experience in firmware development.
Responsibilities
The key responsibilities include:
- Develop firmware for DDR/LPDDR/GDDR/HBM PHY using microcontrollers.
- Collaborate with hardware designers and memory subsystem architects.
- Support debugging of firmware-based simulations and emulation issues.
- Implement algorithms based on collaborations with verification teams.
Requirements
Must-have skills include:
- 4-6 years of experience in developing bare-metal firmware.
- Proficiency in C programming and embedded software development.
- Ability to debug RTL simulations.
- Knowledge of Shell/Perl/Python/TCL scripting.
- Experience with verification EDA tools.
- Strong debugging and communication skills.
Education Requirements
Not specified.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
