Lead Application Engineer – Sign-Off
Lead technical engagements with customers to drive adoption of Cadence digital implementation, physical design, and static verification solutions, with a focus on sign-off tasks (timing closure, EM/IR, and power/signal integrity).
The role combines hands-on physical design work, methodology development, and cross-team coordination with customer design teams, Cadence R&D, and Product Engineering to ensure successful tapeouts and tool adoption.
Senior — the posting specifies 3+ years of hands-on experience in physical design and verification.
Key responsibilities include technical leadership, customer support, and design sign-off activities.
Must-have technical skills and professional traits.
BS or MS in Electrical Engineering or Computer Science is specified. The posting requires 3+ years of hands-on physical-design and verification experience.
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
