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IP Subsystems Architect

Synopsys
November 2, 2026
Full-time
On-site
Bengaluru, Karnataka, India
SoC Architecture Jobs, Level - Senior

Job Title

IP Subsystems Architect

Role Summary

Lead architect responsible for defining and delivering complex SoC/IP subsystem architectures (memory controllers, compute blocks, interconnects, power management units, communication subsystems) and ensuring their integration into production silicon.

Work across hardware, software, verification and physical design teams to optimize performance, power, area and reliability while providing clear architecture documentation and technical leadership.

Experience Level

Senior - requires extensive experience. The posting specifies 15+ years of industry experience and at least 10 years in semiconductor design, IP integration, or SoC/subsystem architecture.

Responsibilities

Primary responsibilities include:

  • Define architectural specifications for complex subsystems (memory controllers, compute blocks, interconnect clusters, PMUs, communication subsystems).
  • Translate system-level requirements into detailed subsystem architectures, optimizing performance, bandwidth, latency, power, and reliability.
  • Integrate multiple IP blocks into cohesive subsystems, ensuring interoperability, dataflow alignment, and SoC-level constraint compliance.
  • Lead cross-functional collaboration with hardware, software, verification, and physical design teams to ensure subsystem feasibility and correctness.
  • Establish verification and validation strategies, define coverage requirements, and participate in silicon bring-up and debug sessions.
  • Produce architecture documents, specifications, and guidelines; communicate architectural intent to stakeholders.
  • Mentor and coach engineering teams and drive best practices.

Requirements

Must-have technical skills and proven capabilities:

  • Deep expertise in Verilog/SystemVerilog, simulation tools, and advanced verification methodologies (SV UVM, BFM development).
  • Proficiency with industry-standard interface protocols: AMBA (APB/AXI/CHI), DDR, PCIe, Ethernet, USB, UFS.
  • Experience with synthesis, lint, CDC analysis, low-power flows and achieving verification closure.
  • Strong documentation, requirements management, and cross-team communication skills.
  • Demonstrated leadership in architectural design and ability to mentor engineers.

Nice-to-have: hands-on silicon bring-up and debug experience.

Education Requirements

Bachelor's or Master's degree in Electronics or a related field. The posting also specifies 15+ years of industry experience and at least 10 years in semiconductor design, IP integration, or SoC/subsystem architecture.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-10-29