IP (PCIE/CXL/USB/DP) Subsystem Design Implementation Engineer
SynopsysJob Title
IP (PCIE/CXL/USB/DP) Subsystem Design Implementation Engineer
Role Summary
The role focuses on the design and implementation of IP subsystems targeting PCIE, CXL, USB, and DP technologies. The position is essential for ensuring high-performance solutions in ASIC design within the Applications Engineering team.
Experience Level
Mid-level experience is preferred, with relevant experience in hardware engineering.
Responsibilities
Key responsibilities include:
- Design and implement IP subsystems for various protocols.
- Collaborate with software and hardware teams to integrate designs.
- Testing and validation of implemented designs.
- Contribute to technical documentation and review processes.
Requirements
Must-have skills include:
- Experience with IP design methodologies and ASIC development.
- Proficiency in hardware description languages (HDL).
- Familiarity with PCIE, CXL, USB, and DP standards.
- Analytical and problem-solving skills.
Nice-to-have:
- Experience with verification tools and techniques.
- Knowledge of software development practices for hardware.
Education Requirements
A degree in Electrical Engineering or a related field is required.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
