IP Design PEY Intern

Job Title

IP Design PEY Intern

Role Summary

Work on Altera's IP Solutions Engineering team to develop and verify FPGA RTL and IP cores for external memory interfaces (DDR, LPDDR), MIPI cameras/sensors, and other high-speed I/O. The role covers architecture, RTL implementation, verification, CAD/tool integration, hardware bring-up, and documentation.

Experience Level

Entry-level internship (PEY). Intended for students or recent students; candidates typically have at least 3+ months of practical experience in digital logic design/verification and scripting or software programming.

Responsibilities

Primary responsibilities include design, verification, integration, and cross-team collaboration to deliver production IP cores and reference examples.

• Define architecture and design according to DDR, LPDDR, and MIPI protocol specifications.
• Develop RTL (SystemVerilog/Verilog/VHDL) for IP cores and examples.
• Integrate device support and CAD tool flows (Quartus Prime and related tools).
• Create and maintain verification IP, testbenches, regression suites, and bus functional models.
• Support hardware power-on, bring-up, and debug activities.
• Support product releases, rollouts, and cross-team validation.
• Provide technical support to internal teams and customers as needed.

Requirements

Minimum technical skills and professional traits required for initial consideration, followed by preferred qualifications.

• Must-have: 3+ months practical experience in digital logic hardware design or verification (SystemVerilog, Verilog and/or VHDL).
• Must-have: 3+ months experience with scripting or software programming (Python, TCL, Perl and/or C/C++).
• Strong communication, initiative, teamwork, problem-solving, and attention to detail.
• Motivated to learn and adapt to rapidly changing technologies.
• Applicants must be eligible for any required Canada export authorizations.
• Nice-to-have: FPGA design experience and familiarity with RTL simulation, timing closure, and static timing analysis.
• Nice-to-have: Experience with DDR, LPDDR, or MIPI hardware interfaces and hardware bring-up.
• Nice-to-have: Experience with Quartus Prime or similar ASIC/FPGA CAD tool integration.

Education Requirements

Currently pursuing a BS degree (or equivalent in-progress study) in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science, or a related technical field. Relevant experience via coursework, projects, internships, or military service is acceptable.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.