Infinity Fabric Verification Staff Engineer

Role Overview

The Infinity Fabric transport layer verification team is seeking a pre-silicon verification engineer to verify configurable switches and die-to-die interconnects within the Infinity Fabric architecture. This role involves enhancing the testbench and mentoring junior engineers while being integral to the development of AMD products across multiple markets including AI, Client, Server, and Graphics.

Experience Level

Preferred candidates should possess an extensive background in verifying complex design blocks at the IP or SoC level, utilizing SystemVerilog/UVM or similar technologies. Comfort in test plan creation and execution, along with experience in leading verification teams is essential.

Key Responsibilities

• Create project schedules and staging plans for new feature development.
• Develop and enhance SystemVerilog/UVM-based testbenches to verify new features.
• Collaborate with architects, RTL designers, performance engineers, and post-silicon validation engineers.
• Lead a team of verification engineers to ensure timely execution within project schedules.
• Mentor junior verification engineers.

Required Skills and Knowledge

Candidates should have:

• A solid foundation in Systems & SoC architecture with expertise in areas such as CPU or GPU, memory subsystems, and I/O subsystems.
• Experience in architecting complex verification environments in SystemVerilog or C++.
• Proven track record in implementing verification tests and leading verification processes.
• Strong communication and management skills.

Education Requirements

A Master’s degree in a relevant discipline is preferred.