Infinity Fabric Verification Engineer

Role Overview

The Infinity Fabric Verification Engineer will be a key player in the verification team at AMD, focusing on the verification of the configurable switches and die-to-die interconnect of the Infinity Fabric architecture. This role is integral to the development of AMD products in various markets, including AI/ML, Client, Server, and Graphics.

Experience Level

The role is aimed at candidates with significant industry experience, ideally between 7-12 years, with a strong focus on verification methodologies.

Key Responsibilities

• Develop and enhance SystemVerilog / UVM-based testbenches for the verification of new features within client, server, graphics, and semi-custom interconnects.
• Design and enhance Behavior Function Models (BFM) and Universal Verification Components (UVC) for both industry standards and AMD protocols.
• Work closely with architects, hardware engineers, and various IP development groups to streamline the verification process.
• Collaborate with RTL designers, performance engineers, and post-silicon validation teams to deepen understanding of Infinity Fabric architecture.
• Mentor and guide junior engineers in best practices and verification strategies.

Qualifications and Skills Required

The ideal candidate will possess comprehensive experience with SystemVerilog or C++, emphasizing Object-Oriented Programming principles. Familiarity with scripting languages such as Perl, Ruby, or Make is beneficial. A background in RTL design, software development, or formal verification will be an added advantage.

Education Requirements

A Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science is required.