Implementation Timing / STA Design Engineer
QualcommJob Title
Implementation Timing / STA Design Engineer
Role Summary
Join Qualcomm's SoC Implementation team to develop timing constraints, perform static timing analysis (STA), and support timing closure for premium SoCs across advanced process nodes. The role works closely with RTL and physical design teams to ensure correct timing, low-power crossings, and signoff-ready analysis.
Experience Level
Mid-level. Candidates typically have several years of ASIC/STA experience (see Education Requirements for degree-and-experience combinations).
Responsibilities
The role focuses on STA, timing constraints, and cross-team coordination to achieve timing closure.
- Develop and validate timing constraints for power-aware synthesis, multi-mode/multi-corner signoff, and low-power multi-voltage domain crossings.
- Perform static timing analysis and signoff using industry STA methodologies.
- Generate and review clock domain crossing (CDC) constraints and ensure correct integration into SoC flows.
- Collaborate with RTL and physical design teams to identify timing bottlenecks and enable fixes for closure.
- Analyze timing across modes/corners and assess path pessimism, margins, and impact on closure.
- Integrate hierarchical module (HM) constraints into SoC-level timing and verify correlation.
Requirements
Must-have technical skills and tools for day-to-day work.
- Hands-on STA and timing closure experience on complex SoC blocks.
- Proficiency with STA tools such as Synopsys PrimeTime and familiarity with Fishtail/TCM or equivalent tools.
- Experience with CDC analysis and constraint generation for multi-voltage domains and low-power designs.
- Skill in power-aware synthesis flows and timing signoff across modes/corners.
- Scripting skills for automation and analysis in Tcl, Perl, or Python.
- Ability to work cross-functionally with RTL and physical design teams and communicate timing issues clearly.
Education Requirements
One of the following is required: Bachelor's degree in Science, Engineering, or related field plus 4+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering, or related field plus 3+ years of such experience; OR PhD in Science, Engineering, or related field plus 2+ years of such experience.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
