IC RTL2GDS Architect, AE

Job Title

IC RTL2GDS Architect, AE

Role Summary

Technical leader on Cadence’s North America Field Applications Team driving customer engagements and delivering advanced digital implementation and signoff solutions for semiconductor customers.

Main mission: improve design convergence and PPA at advanced process nodes through cross-functional alignment, hands-on flow optimization, and strategic technical guidance.

Experience Level

Senior — requires 15+ years of experience in IC design implementation and signoff.

Responsibilities

Primary responsibilities include technical leadership, customer-facing engagements, and enabling advanced implementation methodologies.

• Lead technical engagements to achieve PPA targets and design closure at advanced nodes (3nm and below).
• Guide customer adoption of digital implementation, signoff technologies, and Agentic-AI features.
• Collaborate with R&D and product engineering to influence tool and flow improvements based on customer requirements.
• Develop and deploy benchmarks, optimized flows, and automation for synthesis, P&R, STA, IR drop, and power/timing closure.
• Provide technical leadership for large-scale programs and influence executive-level stakeholders.
• Represent the company at industry forums, author technical material, and deliver external presentations.

Requirements

Must-have technical skills, tools experience, and leadership capabilities.

• Deep expertise in digital design fundamentals and advanced-node implementation (3nm and below).
• Extensive experience with EDA tool ecosystems and flow customization for design closure.
• Proficiency in scripting and automation (Tcl, Python, Perl) for flow and benchmark development.
• Proven track record of leading technical teams and managing large technical programs.
• Strong communication, negotiation, and stakeholder-influence skills.
• Nice-to-have: prior hands-on experience with Cadence tools (Genus, Innovus, Tempus, Voltus, Conformal, Cerebrus) or equivalent competitive solutions.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, or a related technical field.

California annual salary range: $157,500–$292,500; incentive compensation (bonus, equity) and benefits may apply.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.