Job Title
Hybrid FPGA Design Engineer — Verilog & High-Performance Digital
Role Summary
Design and verify high-performance digital systems implemented on FPGAs. The role focuses on RTL development, simulation, synthesis/implementation, and integration with other system components.
Work as part of a cross-functional engineering team in a hybrid schedule (onsite three days per week) at the Laguna Woods, CA office. Benefits include medical and vision insurance.
Experience Level
Mid-level. The posting specifies approximately 5+ years of experience in digital design and FPGA development.
Responsibilities
Key responsibilities include design, verification, and integration tasks for FPGA-based digital systems.
- Develop and maintain RTL using Verilog for high-performance digital designs.
- Create and run simulations to verify functionality and timing (ModelSim or equivalent).
- Perform synthesis and FPGA implementation using tools such as Vivado.
- Collaborate with firmware, hardware, and systems engineers to integrate designs.
- Participate in design reviews, debug lab bring-up issues, and support system validation.
Requirements
Must-have technical skills and work expectations; concise distinction of essentials and desirable items.
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Must-have: 5+ years of digital design experience focused on FPGA development.
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Must-have: Proficient RTL coding in Verilog.
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Must-have: Experience with simulation/verification tools (ModelSim or equivalent).
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Must-have: Experience with synthesis and FPGA implementation flows (Vivado or equivalent).
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Must-have: Ability to work collaboratively across engineering disciplines in a hybrid environment (3 days/week onsite).
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Nice-to-have: Experience with timing closure, constraints, or FPGA lab bring-up (not explicitly required in the posting).
Education Requirements
Not specified.
About the Company
Company: BrainChip
Developer of neuromorphic AI hardware and software for edge computing, creating low-power AI processors, IP and solutions for embedded and real-time applications.

Date Posted: 2026-06-13