HLD Validation Technical Lead

Job Title

HLD Validation Technical Lead

Role Summary

Technical lead responsible for validating high-level design (HLD) software toolchains and flows for FPGA products. Leads validation strategy, test development, automation, and release-quality assessments while coordinating across software, hardware, and product teams.

Experience Level

Senior-level. Requires 8+ years of FPGA or software-tool validation experience and 3+ years of technical or project leadership guiding engineers on complex validation work.

Responsibilities

Lead and coordinate validation activities for HLD tools and related flows across the product lifecycle.

• Define validation strategy, test plans, regression suites, and release criteria for HLD products.
• Design, develop, and maintain automated test infrastructure and CI/CD for repeatable validation.
• Debug cross-layer issues involving software, FPGA tool chains, and hardware; analyze results and recommend risk-based dispositions.
• Oversee defect triage, release-quality assessments, and documentation of validation results.
• Mentor and guide validation engineers; ensure knowledge transfer and maintainable test assets.
• Communicate validation status, risks, and recommendations to technical and nontechnical stakeholders.

Requirements

Must-have technical skills, hands-on experience, and leadership capabilities.

• 8+ years experience in FPGA development, software-tool verification, or validation, including hands-on work with FPGA design flows.
• 3+ years technical leadership or project leadership experience coordinating complex validation efforts.
• Strong understanding of FPGA architectures and tool flows: design entry through compilation, simulation, implementation, timing analysis, and hardware execution.
• Experience developing validation strategies, regression suites, defect reports, and release-quality assessments for complex tools.
• Proficiency with scripting and automation (Python, Perl, Tcl, shell) and experience with CI/CD or automated regression infrastructure.
• Proven ability to debug cross-layer software and FPGA issues and communicate findings effectively.
• Strong collaboration, mentoring, and written/verbal communication skills in cross-functional teams.

Nice-to-have:

• Direct experience with HLD tool categories (high-level synthesis, DSP- or AI-oriented FPGA tools, compiler flows, design-generation tools) and FPGA AI Suite, HLS Compiler, or DSP Builder.
• Hands-on experience with Intel/Altera Quartus Prime or comparable vendor tools; familiarity with Verilog/VHDL, synthesis, place-and-route, and timing analysis tools.
• Experience with FPGA development kits, board-level testing, SoC integration, PCIe or embedded flows, and hardware/software bring-up.
• Experience with Linux and Windows test environments, containers/VMs, shared lab infrastructure, performance characterization, AI model benchmarking, and UI automation tools (Playwright, Selenium) where applicable.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, Software Engineering, or a related field is required.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.