High Speed PHY System Architect

Job Title

High Speed PHY System Architect

Role Summary

Senior system architect responsible for analog and mixed-signal (AMS) IP architecture, signal processing and calibration algorithms for high-speed PHYs integrated into SoCs. The role partners with IP design, verification, and SoC teams to define architectures and ensure performance, power, and area targets are met for product deployment.

Position is based in Santa Clara, CA or Hillsboro, OR and is eligible for a hybrid work model.

Experience Level

Senior-level. Typical experience guidelines: Bachelor's +9 years, Master's +6 years, or PhD +3 years (per job minimums).

Responsibilities

Primary responsibilities include system- and transistor-level architecture work, cross-functional collaboration, and performance optimization.

• Define and drive analog and mixed-signal IP architectures, microarchitectures, and calibration strategies for AMS IPs used in SoCs.
• Perform top-down architectural analysis and transistor-level feasibility studies for AMS circuits.
• Design and evaluate novel architectures and provide proof-of-concept alternatives to meet performance, power, and area goals.
• Leverage digitally assisted analog techniques and optimize analog/digital partitioning to improve system performance.
• Develop models and run simulations to optimize power, area, and performance; analyze results and recommend improvements.
• Collaborate with IP design, verification, and SoC teams to integrate and validate AMS IPs.
• Influence cross-functional roadmaps and define future AMS IP technology targets.
• Mentor and technically guide team members; communicate design trade-offs and decisions effectively.

Requirements

Must-have technical skills and experience required for initial consideration.

• Analog and mixed-signal circuit design experience in standard CMOS technologies (op-amps, comparators, bandgaps, linear regulators).
• Experience with backend verification tools and analyses such as Monte Carlo, EM/IR checks, and static/dynamic MOSFET voltage checks.
• Analog behavior modeling and system-level understanding of AMS circuits, including transmission line theory and AMS system modeling.
• Experience defining architectural features, high-speed design techniques, and IP architecture for PHYs.
• Proven track record of high-speed PHY designs from concept through qualification.

Nice-to-have:

• Proficiency in MATLAB or similar modeling tools.
• Post-silicon debugging and experience with high-volume productization.
• Familiarity with signal integrity and power integrity analysis.
• Background in analog layout techniques (floor-planning, matching, shielding, parasitic optimization).

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or related STEM field with 9+ years of experience; OR Master's in Electrical Engineering, Computer Engineering, or related STEM field with 6+ years; OR PhD in Electrical Engineering, Computer Engineering, or related STEM field with 3+ years.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.