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High-Speed I/F Subsystem Design Engineer

Renesas
March 02, 2026
Full-time
On-site
Kodaira, Tokyo, Japan
Level - Mid-Career

Role Summary

The High-Speed I/F Subsystem Design Engineer will work on the development of high-speed interface subsystems for automotive SoCs, particularly within the R-Car series. This role involves both internal IP development and the integration of external IPs to enhance performance and functionality.

Experience Level

Mid-level, with practical experience in digital circuit design or verification.

Responsibilities

The main responsibilities include:

  • Development of high-speed interface subsystems for automotive SoCs.
  • Engagement in the specification study, logical design, verification, debugging, and evaluation for interfaces like PCIe, UCIe, USB, and UFS.
  • Participation in design reviews and failure analysis to contribute to quality improvement.
  • Collaboration with teams in Japan, India, and Vietnam within a global development framework.

Requirements

The ideal candidate should possess the following:

  • Experience in digital circuit design or verification related to SoC or IP development.
  • Capability to understand design specifications and technical documents.
  • Experience in technical discussions and collaborative problem-solving.
  • Ability to read and write technical documents in English, with no reservations in communicating with global teams.

Education Requirements

Information not specified.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-03-02