High Bandwidth Memory Design Architect - E1 to SMTS

Job Title

High Bandwidth Memory Design Architect - E1 to SMTS

Role Summary

Join the Heterogeneous Integration Group (HBM Architecture) to analyze and define next‑generation High‑Bandwidth Memory products. The role focuses on architecture analysis, modeling, simulation, and cross‑discipline tradeoff studies to inform design and technology pathfinding.

Experience Level

Senior level (title denotes Architect; internal level range E1 to SMTS). The posting does not specify a years‑of‑experience range.

Responsibilities

Perform technical analysis, modeling, and cross‑functional evaluation to guide HBM architecture and implementation decisions.

• Analyze HBM and DRAM architectures using analytical models, simulations, silicon data, and AI‑assisted techniques to assess timing, bandwidth, power, area, thermal behavior, reliability, and design complexity.
• Develop and apply modeling, simulation, and data‑analysis methodologies to evaluate alternative architectures and identify sensitivities.
• Collaborate with architecture, circuit design, layout, packaging, product, and system teams to evaluate implementation feasibility, signal integrity, power delivery, and manufacturability.
• Perform root‑cause analysis using simulation and measured data to validate models and provide evidence‑based recommendations.
• Communicate technical findings through presentations, design reviews, and written documentation, clearly stating assumptions, risks, and recommended actions.

Requirements

Key must‑have skills and experience followed by desirable qualifications.

• Must‑have: Strong foundation in at least two areas such as CMOS circuits, analog/mixed‑signal design, semiconductor devices, computer architecture, memory systems, thermal sciences, signal integrity, power delivery, or advanced packaging.
• Must‑have: Experience developing engineering models, simulations, or analytical methodologies (industry or university project experience acceptable).
• Must‑have: Demonstrated ability to evaluate complex technical problems and draw evidence‑based conclusions.
• Must‑have: Strong analytical, problem‑solving, written, and verbal communication skills for multidisciplinary teams.
• Nice‑to‑have: Experience with HBM, DRAM, SRAM, memory controllers, high‑speed interfaces, or 3D integration technologies.
• Nice‑to‑have: Familiarity with circuit and system simulation tools (HSPICE, FineSim, Spectre, or similar).
• Nice‑to‑have: Understanding of power, performance, area, timing, thermal, and reliability tradeoffs in advanced semiconductor designs.
• Nice‑to‑have: Experience applying data analytics, AI, Large Language Models, or generative AI to engineering workflows.
• Nice‑to‑have: Technical communication demonstrated via publications, presentations, patents, or design reports.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field is required and must be completed prior to the employment start date. Preferred background includes graduate research, internships, thesis/dissertation, or project experience related to memory or semiconductor topics.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.