Heterogeneous Integration Physical Design Engineer, Staff
QualcommJob Title
Heterogeneous Integration Physical Design Engineer, Staff
Role Summary
Staff-level physical design engineer focused on mask layout, physical verification, and PDK/workflow development for heterogeneous integration and advanced packaging projects. The role supports test-chip design, foundry interaction, and layout-driven debugging for advanced-node silicon and packaging technologies.
Experience Level
Senior / Staff level. Typically expects several years of hands-on ASIC/physical design experience (see Education Requirements for specific years tied to degree level).
Responsibilities
Key responsibilities include mask-layout and physical-design execution, verification, and process/PDK enablement for heterogeneous integration and advanced packaging.
- Design and mask layout of test chips for heterogeneous integration, custom DRAM, silicon components, and passive devices.
- Develop and benchmark design flows and PDKs for heterogeneous integration technologies.
- Interface with foundries to support system-technology co-optimization (STCO) and manufacturing issues.
- Perform layout and design analysis for advanced technology benchmarks and product issue debugging.
- Support physical verification (PEX, DRC, LVS) and DFM workflows for production and test chips.
Requirements
Must-have technical skills and experience; preferred items listed separately.
- Hands-on mask layout and physical design experience, including custom layout work using Calibre and Cadence tools.
- Experience with physical verification and PDK development (PEX, DRC, LVS).
- Test-chip design and execution experience.
- Experience with scripting for layout and verification (svrf, TCL).
- Practical experience with sub-10nm silicon physical design and layout.
Nice-to-have:
- OPC and DFM development experience.
- Hybrid-bonding, u-bump, RDL, 3DIC and advanced packaging integration experience.
- Advanced node process integration and unit-process development experience.
Education Requirements
Minimum qualifications in posting: Bachelor's degree in Science, Engineering, or related field plus 4+ years of relevant ASIC design/verification/integration experience; OR Master's degree plus 3+ years; OR PhD plus 2+ years. Fields cited: science and engineering or related technical fields. (Equivalent practical experience implied by the degree-based alternatives in the posting.)
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
