HBM SoC RTL Design Engineer

Job Title

HBM SoC RTL Design Engineer

Role Summary

The HBM SoC RTL Design Engineer will join the Heterogeneous Integration Group to design, integrate, and validate RTL for logic die in HBM system-on-chip products. The role focuses on RTL development, IP integration, debugging, and pre- and post-silicon support across architecture, verification, physical design, firmware, and product teams.

This is a hands-on engineering position responsible for delivering robust, manufacturable SoC RTL that meets power, performance, area, and schedule targets.

Experience Level

Senior — minimum 10 years of relevant industry experience (per posting).

Responsibilities

Primary responsibilities include:

• Design and implement RTL for SoC-level blocks and subsystems used in HBM logic die.
• Integrate internal and third-party IP (controllers, microcontrollers, NoC, RAS, MBIST, interfaces, adapters, buffers, PHY-adjacent logic).
• Translate architectural and micro-architectural specifications into high-quality RTL implementations in collaboration with SoC architects.
• Participate in SoC-level integration activities: clocking, reset, power intent, and configuration infrastructure.
• Support pre-silicon validation and post-silicon bring-up, including root-cause analysis of silicon issues.
• Contribute to design documentation, block specifications, and design reviews.
• Collaborate cross-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure manufacturable builds.

Requirements

Must-have technical skills and experience:

• Proficiency in SystemVerilog/Verilog and SoC integration methodologies.
• Experience with RTL-to-GDS flow including synthesis, static timing analysis, and sign-off considerations.
• Familiarity with EDA tool flows from Cadence, Synopsys, and/or Siemens.
• Programming/scripting experience (Python, TCL, Perl, or shell scripting).
• Practical experience in IP integration, RTL debugging, and pre-/post-silicon validation.

Nice-to-have:

• Experience with HBM, DRAM, or memory-centric SoC designs.
• Familiarity with high-speed interfaces, clocking strategies, reset architectures, and power management concepts.
• Exposure to DFT concepts (scan, MBIST, BIRA/BISR) and debug methodologies.
• Experience with hardware emulation or acceleration platforms (e.g., Palladium, Veloce, Zebu).

Education Requirements

Bachelor's or master's degree in Electrical Engineering, Computer Engineering, or a related field is specified in the posting; the role also specifies a minimum of 10 years of related experience.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.