HBM Design Architect

Job Title

HBM Design Architect

Role Summary

Micron's HBM Design Architecture team develops memory solutions for AI accelerators, high-performance computing, and data centers. This role leads technical enablement of novel memories and advanced integration, translating device and process capabilities into product architectures and coordinating across device, process, packaging, and design teams.

Experience Level

Senior - requires substantial prior experience; see Education Requirements for specific years-of-experience guidance.

Responsibilities

Primary responsibilities include:

• Lead architecture and feasibility assessments for emerging memories (e.g., DRAM, gain-cell, stacked/vertical DRAM) and advanced integration (hybrid bonding, fine-pitch TSV).
• Apply mainstream DRAM/HBM product knowledge to define product-viability requirements (array architecture, timing, bandwidth, power, RAS, JEDEC considerations).
• Translate device and process characteristics (retention, variability, cell/array physics, BEOL and bonding constraints) into product-level requirements for bandwidth, latency, power, thermals, density, and reliability.
• Identify technology–product gaps, define technology targets, and drive de-risking plans including test vehicles, DOEs, and modeling/simulation strategies.
• Partner with process integration, device, packaging, and design teams to define technology-to-product intercept points and decision criteria.
• Lead system-technology co-optimization studies spanning array architecture, periphery/CMOS-under-array, interconnect, PDN, and thermal trade-offs.
• Develop roadmap proposals and present recommendations to technical leadership and cross-site working groups.

Requirements

Must-have technical skills and experience (see Education Requirements for degree and years guidance):

• Solid grounding in mainstream DRAM and/or HBM product architecture and design: array, periphery, datapath, timing, and power.
• Deep understanding of memory cell and array operation, including sensing, retention, disturb, and variability.
• Working knowledge of semiconductor process technology and its impact on device and circuit behavior.
• Experience translating device/process constraints into product requirements and de-risking plans.
• Proven ability to lead cross-functional technical programs and present to senior technical audiences.

Nice-to-have:

• Experience with vertically coordinated DRAM technologies, gain-cell structures (e.g., 2T0C/IGZO), stacked memory builds, or other emerging memory programs.
• Experience with hybrid bonding, TSV-based 3D integration, or advanced packaging technology development.
• Pathfinding, roadmap development, or memory technology development experience.

Education Requirements

BS in Electrical Engineering, Physics, Materials Science, or a related field with 7+ years of relevant experience; MS with 5+ years; or PhD with 3+ years. Preferred: PhD or equivalent experience with 10+ years. Equivalent practical experience is accepted where specified.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.