Hardware & Silicon Validation Director

Job Title

Hardware & Silicon Validation Director

Role Summary

Lead Marvell's silicon validation team within Central System Engineering responsible for post-silicon bring-up, characterization, and compliance testing of high-speed PHY (SerDes/D2D) products across multiple generations and product lines.

The role owns validation strategy and execution, lab automation and test infrastructure, cross-functional coordination with design/firmware/system teams, and team development. This position may require eligibility for access to export-controlled technology.

Experience Level

Senior — typically 15+ years in semiconductor silicon validation or related hardware disciplines; 5+ years of people management experience.

Responsibilities

Lead validation strategy and delivery for high-speed PHY products and manage the validation organization.

• Manage and grow a multi-disciplinary silicon validation engineering team responsible for post-silicon bring-up, characterization, and production release.
• Define validation methodology, test plans, and execution from A0 silicon through production release.
• Drive bring-up, debug, and characterization of AFE, ADC/DAC, PLL/DLL, CDR, and SerDes IP at block and system levels.
• Oversee compliance and interoperability testing against industry standards (e.g., IEEE 802.3, PCIe Gen5/6).
• Develop and maintain lab automation, test frameworks, and high-throughput characterization infrastructure across PVT corners.
• Coordinate with analog/digital design, DSP, firmware, system engineering, and application teams to resolve silicon issues.
• Own resource planning, headcount, and budget; align validation milestones with product schedules.
• Provide technical mentorship and build a high-performing, inclusive team culture.
• Support customer bring-up, field debug, and issue resolution with customers and field application engineers.

Requirements

Must-have technical skills, leadership experience, and tools familiarity.

• 15+ years in semiconductor silicon validation, hardware design, or closely related disciplines.
• 5+ years of people management with a track record of building and leading engineering teams.
• Deep technical expertise in high-speed PHY validation (SerDes, Ethernet transceivers 10G–800G, and/or PCIe).
• Hands-on experience with post-silicon bring-up, debug, and characterization of mixed-signal ICs.
• Practical experience with lab instrumentation: high-speed oscilloscopes, BERTs, spectrum analyzers, signal generators, network analyzers.
• Proficiency in scripting and test automation (Python, MATLAB, or equivalent).
• Excellent verbal and written communication; able to present complex technical topics to executive leadership.
• Preferred (nice-to-have): experience with IEEE 802.3 and PCIe compliance testing, signal integrity and jitter/eye analysis, DSP algorithms/firmware for transceivers, managing geographically distributed teams, and prior Director-level experience in the semiconductor industry.

Education Requirements

Required: BS or MS in Electrical Engineering or a related technical field. Preferred: MS or PhD in Electrical Engineering with focus on high-speed communications or mixed-signal design.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.