Graduate Verification Engineer
RenesasRole Summary
Renesas is seeking a Graduate Verification Engineer for their Swindon office. The role involves collaborating with cross-regional teams and contributing to design verification processes to ensure silicon success and adherence to performance goals.
Experience Level
Entry-level, suitable for candidates with 0–1 years of experience in Analog Mixed-Signal verification or related areas.
Responsibilities
Key responsibilities include:
- Verification planning, maintenance, feature extraction, and development of verification test cases and checkers.
- Collaborating with US, India, and UK Design and Verification teams.
- Integrating design verification processes for silicon success.
- Performing additional tasks assigned by the Lead or Manager.
Requirements
Essential qualifications include:
- 0–1 years of experience in AMS verification or mixed-signal IC design.
- Proficient in Verilog, SystemVerilog, or Verilog-AMS.
- Understanding of analog circuits, digital design flow, and mixed-signal integration.
- Basic knowledge of PMICs and power management concepts is a plus.
- Familiarity with simulation debugging and waveform analysis.
- Comfortable in a Unix/Linux environment; exposure to shell scripting and basic Python is desirable.
- Able to utilize AI-based tools for engineering efficiency.
Education Requirements
A degree in Electrical Engineering, Computer Engineering, or a related field is preferred.
About the Company
Company: Renesas
Headquarters: Hitachinaka, Japan
Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.
