GPU Logic Design Engineer
Intel CorporationJob Title
GPU Logic Design Engineer
Role Summary
The role focuses on design-for-test (DFT) logic and RTL implementation for GPU/SoC blocks, including RTL coding, simulation, and DFT integration to improve test coverage, debug efficiency, and production ramp. The position sits within the Data Center Group and works across architecture, verification, manufacturing, and post-silicon teams.
Experience Level
Entry-level / early-career: target candidates with 0–1 years of practical experience (internships, academic projects, or coursework). Master's degree holders with no prior professional experience are also eligible.
Responsibilities
Primary responsibilities include DFT logic development, RTL integration, and supporting production testability and debug.
- Develop logic design, RTL code, and DFT timing-closure support for test content (SCAN, MBIST, BSCAN).
- Collaborate on architecture and microarchitecture features for blocks and subsystems under DFT scope.
- Create and optimize high-volume manufacturing (HVM) test content for ATE to support rapid bring-up and production ramp.
- Integrate DFT into RTL and structural code while meeting power, performance, area, and timing constraints.
- Review and drive verification of DFT designs; resolve RTL test failures and implement fixes.
- Integrate DFT blocks into functional IP and SoC and support SoC customers for seamless integration.
- Work with post-silicon and manufacturing teams to support silicon debug and capture lessons learned.
- Drive test coverage and develop structural/IP-specific tests to meet quality and DPM objectives.
Requirements
Must-have technical skills and familiarity relevant to the role. Preferred items are clearly marked.
- Proficiency in RTL coding and simulation (e.g., SystemVerilog, VCS).
- Foundational understanding of DFT methodologies: SCAN, MBIST, BSCAN.
- Experience working with RTL debug and resolving test-related failures (internship or academic project experience acceptable).
- Ability to collaborate across architecture, verification, manufacturing, and post-silicon teams.
- Nice-to-have: Familiarity with SoC architecture/microarchitecture, knowledge of ATE/test-equipment strategies for production ramp, and experience developing HVM test content.
Education Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 0–1 years of hands-on experience (internships, academic projects, coursework, or training), OR a Master’s degree in Electrical Engineering, Computer Engineering, or a related field with no prior professional experience.
About the Company
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
