GPIO Circuit Design Engineer

Job Title

GPIO Circuit Design Engineer

Role Summary

The GPIO Circuit Design Engineer will own end-to-end development of I/O IP blocks (GPIO and related interfaces) across process nodes, from architecture and circuit design through verification, layout supervision and silicon bring-up. The role sits in the MTS Analog I/O design team and collaborates with package, test, and validation teams to deliver qualified IP.

Experience Level

Senior — typically requires 8+ years of experience in semiconductor IP or analog/mixed-signal design.

Responsibilities

Primary duties include designing, validating and delivering I/O IPs and supporting post-silicon qualification.

• Develop and deliver IO IPs (GPIO, LVDS, SSTL, HSTL, MIPI, etc.) across multiple technology nodes, meeting PPA targets.
• Define IO IP architecture and perform circuit design, simulation and verification.
• Ensure reliability and compliance (ESD, pad-ring considerations) during design and verification.
• Collaborate on test-chip design, package and test-board design, and lead post-silicon testing and qualification.
• Supervise and coordinate layout engineers to ensure high-quality physical implementation.
• Perform market and competitor analysis to inform product definition and roadmap.
• Support safe work practices and comply with Environmental, Health, Safety & Security programs.

Requirements

Must-have and preferred technical skills and experience.

• Must-have: 8+ years of experience in semiconductor IP design, with strong background in CMOS and analog/mixed-signal I/O design principles.
• Must-have: Experience with RTL (Verilog/VHDL), synthesis and timing closure.
• Must-have: Familiarity with ESD protection concepts, pad ring design and physical verification flows.
• Must-have: Strong project management and communication skills; experience coordinating cross-functional teams.
• Nice-to-have: Knowledge of process technology impacts on circuit design and high-speed I/O design experience.
• Nice-to-have: Prior experience managing GPIO or similar IO IP blocks.
• Nice-to-have: Experience with silicon validation, lab debug tools and post-silicon bring-up.
• Nice-to-have: Knowledge of low-power IO techniques and IO reliability practices.

Education Requirements

Bachelor's or master’s degree in Electronics Engineering or a related field.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.