FPGA Silicon Validation Engineer

Job Title

FPGA Silicon Validation Engineer

Role Summary

The engineer will own post-silicon validation for assigned FPGA domains and products, leading design bring-up, validation planning, execution, and debug through production. The role requires building scalable test and design automation and coordinating across design verification (DV), IP/integration teams, and customer support.

Experience Level

Mid-level. Typical experience: 5–8 years in post-silicon / FPGA / hardware validation or protocol bring-up.

Responsibilities

Primary responsibilities include hands-on bring-up, validation planning, automation, and cross-team debugging.

• Lead silicon design bring-up for assigned FPGA products and domains.
• Plan and execute PVT testing (corners, voltage/temp sweeps, fmax/margin, stress) and non-PVT testing (functional, feature, system).
• Define, maintain, and scale regression suites: content, automation, overnight runs, fail triage, and exit criteria.
• Architect and deliver design/test automation using Python, Tcl, and C.
• Use RTL and on-chip debug to root-cause failures across hardware, timing, firmware, and board-level issues.
• Set test plans, coverage expectations, and validation exit criteria; drive validation to closure.
• Improve silicon validation environment, methodologies, and tooling.
• Partner with DV, IP/integration (IPSS), and Customer Support on correlation, integration, and field issues.
• Mentor junior engineers and review regression health, bring-up quality, and documentation.
• Represent validation in milestone reviews and technical escalations.

Requirements

Key technical and professional requirements. (Education requirements are listed separately below.)

Must-have:

• 5–8 years post-silicon/FPGA/hardware validation or protocol bring-up experience.
• Proven ownership of design bring-up and delivery of production-quality validation outcomes.
• Hands-on PVT and regression planning, execution, and failure analysis.
• Strong hardware knowledge and lab proficiency (JTAG/debug, oscilloscopes, protocol analyzers).
• Automation skills in Python, Tcl, and C.
• RTL debug ability (Verilog/SystemVerilog or VHDL).
• Demonstrated collaboration with DV, IP/integration teams, and customer-facing teams.
• Clear technical writing for plans, bugs, and status reports.

Nice-to-have:

• Domain depth in Ethernet, ANLT, PTP, D-PHY, CPRI, JESD, SerialLite, DisplayPort, HDMI, SATA, or SAS.
• Thermal chamber / shmoo / margin characterization experience.
• Board/schematic literacy and basic SI/PI for high-speed links.
• Experience mentoring juniors or leading a validation workstream.
• Experience with emulation or pre-silicon to post-silicon correlation.

Education Requirements

B.E. / B.Tech or M.S. in Electrical & Computer Engineering, Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.