FPGA Prototyping Lead

Job Title

FPGA Prototyping Lead

Role Summary

Lead FPGA prototyping strategy and execution for complex SoCs to enable first-pass silicon success. Work closely with Architecture, IP Design, Physical Design, Verification, Software, and Product teams to deliver prototype platforms, RTL adaptation, and system-level validation.

Hands-on technical leadership role responsible for platform architecture, multi-FPGA partitioning, board bring-up, timing closure, and mentoring engineering teams.

Experience Level

Senior — typically 12+ years of FPGA design, implementation, and SoC prototyping experience.

Responsibilities

The role owns FPGA prototyping architecture, platform delivery, and cross-functional coordination to support hardware validation and software bring-up.

• Define and own FPGA prototyping architecture, methodology roadmap, partitioning, interconnects, clocking, and debug infrastructure for complex SoCs.
• Lead development and deployment of prototype platforms including RTL adaptation, implementation flows, verification infrastructure, and regression environments.
• Drive cross-functional collaboration with Architecture, RTL Design, Verification, Emulation, Software, and Firmware teams to enable early validation and software bring-up.
• Provide technical leadership and mentoring for FPGA prototyping engineers; run design reviews and project planning to meet program milestones.
• Establish engineering processes, documentation standards, and continuous improvement initiatives to improve efficiency and scalability.
• Represent the prototyping organization in architecture and program reviews; work with EDA and FPGA tool vendors to adopt technology and resolve technical challenges.

Requirements

Looking for an experienced, hands-on technical leader with deep FPGA prototyping and SoC integration skills. This role is based in San Jose and is not eligible for visa sponsorship.

Must-have:

• Proven experience leading FPGA prototyping efforts for large-scale semiconductor programs.
• Hands-on experience with Synopsys HAPS and/or Cadence Protium platforms.
• Strong knowledge of multi-FPGA partitioning, board bring-up, and high-speed interfaces (PCIe, DDR, Ethernet, USB, HBM).
• Expert proficiency with AMD/Xilinx Vivado and Vitis toolchains.
• Deep expertise in timing closure, floorplanning, CDC analysis, pipelining, and performance optimization on FPGAs.
• Strong SystemVerilog and/or Verilog design and verification experience.
• Solid understanding of modern SoC architectures and protocols (CPUs, cache hierarchies, memory subsystems, NoC/interconnects, AXI, ACE, CHI, PCIe, DDR).
• Demonstrated ability to mentor engineers, run design reviews, and drive cross-functional programs.
• Must be authorized to work in the United States; this role is not eligible for visa sponsorship.

Nice-to-have:

• Experience with system-level regression automation and prototype verification environments.
• History of customer-facing technical discussions and working partnerships with EDA/FPGA vendors.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.