FPGA Post-Silicon Validation Engineer — Configuration, Security and HPS

Job Title

FPGA Post-Silicon Validation Engineer — Configuration, Security and HPS

Role Summary

Lead device- and IP-level validation for FPGA configuration flows, security features, and HPS subsystems on FPGA and SoC devices. Work with architecture, design, firmware, and platform teams to verify secure boot, root-of-trust, configuration robustness, and HPS-to-FPGA integration.

Experience Level

Senior — approximately 8+ years of hands-on silicon validation experience focused on FPGA configuration, security, SoC, or embedded processor subsystems.

Responsibilities

Plan, execute, and improve validation activities that ensure secure, reliable configuration and HPS operation across silicon revisions and customer-like systems.

• Develop validation strategies for configuration, security, and HPS subsystems aligned with device architecture and security requirements.
• Validate FPGA configuration flows (power-on reset, cold/warm configuration, partial reconfiguration, recovery scenarios).
• Validate security features including secure boot, authentication, encryption, key management, and root-of-trust behavior.
• Validate HPS functionality and integration: boot flows, reset/clock sequencing, memory interfaces, and FPGA–HPS interaction.
• Create and execute test cases for robustness, fault injection, security corner cases, and negative testing.
• Perform device and system bring-up and debug configuration failures, security violations, boot issues, and interface problems across silicon revisions.
• Use evaluation boards and reference platforms to ensure interoperability and real-world coverage.
• Drive validation automation, infrastructure improvements, and methodology enhancements to increase coverage and efficiency.
• Collaborate with hardware, firmware, and board teams to influence observability and debug capability on evaluation platforms.

Requirements

Key technical must-haves and desirable skills.

• Must-have: 8+ years of hands-on silicon validation experience focused on FPGA configuration, security, SoC, or embedded processors.
• Strong understanding of FPGA configuration architectures, configuration memories, bitstream management, and recovery mechanisms.
• Strong knowledge of hardware security concepts: secure boot, authentication, encryption, key storage/management, lifecycle states, and threat modeling.
• Experience validating HPS / embedded processor subsystems (boot loaders, reset/clock sequencing, memory bring-up, HW–SW interaction).
• Hands-on system-level validation and debug experience: power-on bring-up, failure analysis, and silicon issue triage.
• Experience with Python for automation, scripting, and test infrastructure.
• Nice-to-have: Verilog familiarity; familiarity with FPGA and SoC architectures.

Education Requirements

Bachelor's or Master's degree in Electrical & Electronics Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.