FPGA Logic Design Engineer

Job Title

FPGA Logic Design Engineer

Role Summary

As an FPGA Logic Design Engineer on Teradyne's Client Compute Test Division, you will design and deliver high‑speed digital and mixed‑signal FPGA-based test instrumentation. Work includes architecture, implementation, verification, and lab validation within a cross‑functional hardware, software, and systems team.

The role focuses on scalable, high-performance test capabilities for advanced semiconductor devices and next‑generation computing components.

Experience Level

Senior — posting requests a minimum of 10 years of practical hardware development experience; 7+ years preferred for senior/principal roles.

Responsibilities

Primary responsibilities include:

• Architect, design, implement, and verify FPGA and mixed‑signal designs for test instruments.
• Perform lab validation, prototyping, and characterization experiments.
• Collaborate with Hardware, Software, and Systems engineering to ensure scalable, maintainable designs.
• Execute product integration, verification testing, and hardware debug.
• Work with design verification teams to simulate designs and achieve appropriate test coverage.
• Act as technical lead and mentor junior engineers on FPGA projects.
• Drive logic design process improvements and evaluate design tools and flows.

Requirements

Must-have technical skills and experience:

• Strong FPGA logic design and physical design experience (floor‑planning, place & route, STA).
• Hands-on experience with Xilinx and/or Intel FPGA toolflows (e.g., Vivado, Quartus).
• Proficient in Verilog and at least one scripting language (Python, TCL, Perl, etc.).
• Experience with high-speed interfaces and protocols such as PCIe, AXI, DDRx, SERDES, USB, MIPI; familiarity with HBM, PLLs a plus.
• Familiarity with verification languages and methodologies (SystemVerilog, UVM), VHDL, and C/C++ preferred.
• Experience with development and verification tools (Cadence Xcelium, Synopsys Spyglass, revision control, JIRA, CI tools).
• Strong troubleshooting, debugging, signal‑integrity understanding, and cross‑functional teamwork skills.
• Minimum of 10 years of practical hardware development experience; 5+ years acceptable for some roles but 7+ preferred for senior/principal positions.

Nice-to-have:

• Standard-cell ASIC design experience.
• Experience with ADC/DAC, DisplayPort, 10/100GE, PRBS, DLLs.

Education Requirements

Bachelor's degree required; advanced degree preferred (MS/PhD) in Electrical Engineering or a related technical field. The posting specifies a BS in electrical engineering or related field; advanced degree preferred.

About the Company

Company: Teradyne

Headquarters: North Reading, Massachusetts, United States

Teradyne is a global leader in test and automation solutions, ensuring every electronic device performs effectively. Their sophisticated technology helps manufacturers develop and deliver products quickly and cost-effectively, supporting various industries worldwide. With a strong commitment to fostering a diverse and inclusive work environment, Teradyne encourages innovation and collaboration among its employees.