FPGA Engineer (requires Active Secret clearance)

Job Title

FPGA Engineer (requires Active Secret clearance)

Role Summary

Design, implement, and verify high-performance FPGA systems from requirements through integration and test for programs requiring an active Secret security clearance. Work on VHDL-based designs targeting major vendor FPGAs for high-speed communications, digital signal processing, and embedded interfaces.

Onsite position supporting engineering teams in the Tucson/Oro Valley area on defense-related programs.

Experience Level

Senior-level. The posting requires a minimum of 8 years of relevant FPGA design/verification experience.

Responsibilities

Accountable for full FPGA development lifecycle and delivering production-quality releases.

• Architect FPGA-based systems: select parts, define interfaces, and establish CONOPS.
• Translate system-level requirements into FPGA requirements and designs.
• Implement designs in VHDL emphasizing reliability and maintainability.
• Create and execute verification plans using directed and constrained-random tests; track functional and code coverage.
• Integrate and debug FPGA designs at the board and system level.
• Produce documentation: requirements, verification plans, and user guides.
• Participate in technical reviews and support program schedule and budget execution.

Requirements

Key qualifications and skills. Candidates who do not hold an active Secret clearance are not eligible.

Must-have:

• Active Secret security clearance (required).
• Minimum 8 years of relevant FPGA design and verification experience.
• Hands-on digital design and VHDL coding for FPGAs.
• Experience with Xilinx or Microsemi devices and vendor tool flows.
• Proven experience delivering FPGA solutions for system-level applications, including integration and debug.
• Experience developing and executing verification using self-checking tests and coverage tracking.
• Ability to produce clear technical documentation and work collaboratively on engineering teams.

Nice-to-have:

• Radar or image processing experience (visual or infrared sensors).
• Embedded systems experience with ARM, MicroBlaze, or Nios processors.
• Experience with gigabit serial interfaces and multi-gigabit transceivers (MGTs).
• Constrained-random verification using UVM/SystemVerilog and emulation platforms (e.g., Veloce).

Education Requirements

Bachelor's degree plus 5+ years of relevant experience, or a Master's degree plus 6+ years of relevant experience, as stated in the posting.

About the Company

Company: Solidus Technical Solutions