FPGA Engineer, EW

Job Title

FPGA Engineer, EW

Role Summary

Join the Electronic Warfare (EW) team responsible for designing high-reliability radios, embedded processing, and FPGA-based signal processing for software-defined radio platforms. Lead end-to-end FPGA design and verification on AMD/Xilinx SoC/FPGA devices and collaborate with electrical and software engineers to deliver mission-capable EW systems.

US base salary range: $146,000–$194,000 (estimate, base salary only).

Experience Level

Mid-level - 4–7 years professional experience.

Responsibilities

Primary responsibilities include development, integration, and verification of FPGA subsystems used in software-defined radios and EW platforms:

• Own FPGA development and verification for software-defined radio platforms.
• Design and test VHDL/Verilog DSP modules and supporting infrastructure.
• Integrate modules into larger FPGA cores; resolve resource, timing, and resource-contention issues.
• Implement CDC strategies and support static timing analysis (STA) and timing closure.
• Bring up boards with software and electrical engineers; develop drivers for RF components (PLLs, mixed-signal front ends).
• Use CI/HITL workflows and Git-based processes to validate designs.
• Manage project deliverables, documentation, and cross-team communication.

Requirements

Required technical skills, security eligibility, and development practices:

• 4–7 years professional FPGA engineering experience.
• Proficient in HDL (VHDL and/or Verilog) and FPGA design flows for AMD/Xilinx or Intel/Altera devices.
• Experience with CDC, STA, and FPGA device primitives.
• Experience with high-speed digital interfaces (PCIe, JESD, Aurora, multi-Gbps optical).
• Proficiency in a higher-level language for verification (C, Python, SystemVerilog, etc.).
• Proficiency in a Linux development environment and familiarity with Git and CI/CD workflows (TCL, CI/HITL).
• Eligible to obtain and maintain an active U.S. Secret security clearance.
• Self-starter, outcome-driven, and strong communicator.

Preferred:

• Experience with the latest AMD SoC/FPGAs and advanced AMD features (partial reconfiguration, DFX, segmented flows).
• Working knowledge of FPGA NOC architectures and advanced design features.
• Signal-processing experience (data converter to bits) and DSP implementation for embedded devices.
• Exposure to wireless communications, radar systems design, and RF test equipment (spectrum analyzer, signal generators, oscilloscopes).

Education Requirements

Not specified.

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.