Skip to main content
Anduril logo

FPGA Engineer

Anduril
September 21, 2026
Full-time
On-site
Broomfield, Colorado, United States
$143,000 - $191,000 USD yearly
FPGA Programming Jobs, Level - Senior

Job Title

Senior FPGA Engineer

Role Summary

Technical lead for FPGA development on airborne radar products within the Battlespace Awareness team. Responsible for translating signal-processing algorithms into FPGA implementations, defining architecture, and driving designs from concept through production.

Experience Level

Senior-level. The role requests 12+ years of professional FPGA design and development experience.

Responsibilities

Primary responsibilities include FPGA architecture, RTL development, verification, and mentorship to scale FPGA capabilities for airborne radar systems.

  • Lead FPGA architecture, design, and verification for airborne radar systems from concept through production.
  • Translate signal-processing algorithms into efficient FPGA implementations on Altera FPGA/SoC platforms.
  • Design and implement DSP chains: data acquisition, filtering, and real-time processing.
  • Perform timing analysis, resource optimization, and debugging of complex FPGA designs.
  • Establish coding standards, verification methodologies, and FPGA design processes for the team.
  • Develop and maintain design documentation, architecture specs, and verification plans.
  • Collaborate with cross-site engineering teams to ensure design consistency and integration.
  • Mentor and guide other engineers as the team scales FPGA capabilities.

Requirements

Must-have technical skills, experience, and eligibility requirements.

  • 12+ years of professional FPGA design and development experience.
  • Strong RTL design experience using SystemVerilog and/or VHDL.
  • Demonstrated experience with Altera FPGA devices and toolchains (Quartus) and familiarity with FPGA toolflows.
  • Proven experience implementing digital signal processing on FPGAs.
  • Experience with FPGA verification methodologies and simulation tools.
  • Strong understanding of timing closure, resource optimization, and FPGA design constraints.
  • Self-directed technical leadership; ability to drive projects from requirements to hardware implementation.
  • Eligible to obtain and maintain an active U.S. Secret security clearance.

Nice-to-have:

  • Experience with radar systems or software-defined radio development.
  • Familiarity with high-speed interfaces (PCIe, Ethernet, JESD204B) and RFSoC, Xilinx Zynq UltraScale+, or Altera AgileX platforms.
  • Experience with MATLAB and algorithm-to-hardware workflows, embedded software for FPGA SoC, and DO-254 or similar airborne hardware standards.
  • Background in aerospace/defense systems, version control (Git), and CI workflows.

Education Requirements

Bachelor's degree in electrical engineering, electronics engineering, computer engineering, or a related field (as listed in the posting).


About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.

Anduril logo

Date Posted: 2026-09-21