FPGA Digital Design Engineer (6+ month Contract)

Job Title

FPGA Digital Design Engineer (6+ month Contract)

Role Summary

Contract FPGA Digital Design Engineer responsible for digital FPGA design, implementation, verification, and integration within the engineering team. This is a remote, 6+ month contract role supporting Kepler's engineering efforts.

Experience Level

Mid-level (Level - Mid-Career). Years of experience not specified.

Responsibilities

Typical responsibilities for this role include:

• Develop RTL code (SystemVerilog/Verilog) for FPGA-based digital systems.
• Create and maintain simulation testbenches and automated verification resources.
• Perform synthesis, timing closure, and FPGA implementation using vendor tools.
• Support lab bring-up, hardware debug, and integration with boards and subsystems.
• Collaborate with system architects, firmware, and test teams to meet requirements.
• Document designs, test results, and support handover to integration teams.

Requirements

Core requirements and desirable skills (as typically expected for this role):

• Must-have: Practical experience with FPGA digital design and RTL (SystemVerilog/Verilog); familiarity with synthesis, timing analysis, and vendor tool flows.
• Must-have: Experience with simulation and verification methodologies and writing testbenches.
• Must-have: Hands-on hardware debug and lab experience (FPGA boards, JTAG, logic analyzers).
• Nice-to-have: Experience with VHDL, embedded firmware interfaces, scripting (Python/Bash) for automation, or prior work in communications or satellite systems.
• Nice-to-have: Familiarity with formal verification, IP integration, or high-speed serial protocols.

Education Requirements

Not specified.

About the Company

Company: Kepler

Headquarters: Toronto, Ontario, Canada

Kepler is a Toronto-based satellite communications company that designs, builds, and operates small satellites to provide global connectivity, data relay, and in-orbit services for IoT and other commercial customers.