Job Title
FPGA Development Tools Engineer β Synthesis
Role Summary
The Synthesis engineer develops and improves synthesis algorithms and related compiler components that convert RTL into optimized hardware for Altera FPGA platforms. The role works within the FPGA compiler/toolchain team and collaborates with placement, routing, timing, architecture, and validation groups.
Position is based in the Toronto office. Canadian work experience is not required; applicants must be eligible for any required Canada export authorizations.
Experience Level
Mid-level (6+ years experience in FPGA/ASIC design, EDA tools, or related fields).
Responsibilities
Primary responsibilities include developing synthesis capabilities, improving quality of results, and integrating synthesis with the broader compiler flow.
- Design, implement, and optimize synthesis algorithms for Verilog/SystemVerilog/VHDL to gate-level conversion.
- Integrate synthesis with placement, routing, and static timing analysis stages of the compiler toolchain.
- Improve QoR (performance, power, area) through synthesis-driven techniques and optimizations.
- Analyze and transform complex RTL; develop RTL analysis tools and methodologies.
- Debug synthesis results (timing, logic structure, mapping) and drive resolutions with cross-functional teams.
- Develop tooling, scripts, and automation to improve synthesis flows and engineer productivity.
Requirements
Must-have skills and experience for immediate contribution.
Must have:
- 6+ years of experience in FPGA/ASIC design, EDA tools, or related fields.
- Hands-on RTL experience with Verilog/SystemVerilog or VHDL and synthesis flows.
- Proficiency in C/C++ for tool development; strong algorithms and data structures knowledge.
- Experience debugging and performing performance analysis of complex systems.
- Understanding of logic synthesis, optimization techniques, and timing-driven design considerations.
- Ability to analyze complex systems and implement scalable, high-performance solutions.
Nice to have:
- Experience with synthesis tools or FPGA toolchains (Quartus, Vivado).
- Knowledge of FPGA architectures (LUTs, DSPs, BRAM, interconnect) and advanced optimizations (retiming, logic restructuring, resource sharing).
- Scripting experience (Python, Tcl) and background in compiler development or EDA algorithms.
- Experience working in large, distributed engineering teams.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. Candidates with a PhD are encouraged to apply; relevant experience gained during doctoral studies may be considered toward the required years of experience.
About the Company
Company: Altera
Headquarters: Bengaluru, Karnataka, India
Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.

Date Posted: 2026-06-04