FPGA Design Engineer, Senior Principal

Job Title

FPGA Design Engineer, Senior Principal

Role Summary

Lead FPGA digital design efforts across multidisciplinary teams to deliver mission-critical embedded systems. Work from concept through delivery on high-impact projects involving RF DSP, high-speed interfaces, and hardware/software integration.

Collaborate with systems, hardware, and software engineers, own design solutions, and mentor other engineers while maintaining program schedule and budget awareness.

Experience Level

Senior - requires significant technical leadership and extensive hands-on FPGA design experience (seniority and years detailed in Requirements).

Responsibilities

Primary responsibilities include architecture, implementation, verification, integration, and technical leadership for FPGA-based systems.

• Define technical solutions and contribute to program proposals, effort estimates, and budgets.
• Architect and implement FPGA designs across major device families (Xilinx, Intel/Altera, Microchip, Lattice) using VHDL/SystemVerilog.
• Develop gigabit serial links, RF DSP blocks, control loops, embedded processing, and processor interfaces.
• Perform synthesis, place-and-route, static timing analysis, and design optimization.
• Build test benches, simulation environments, and perform static verification (Lint, Autocheck, CDC, RDC).
• Lead lab integration and real-time testing; incorporate flight-test and end-user feedback.
• Manage version control and CI workflows (Git/GitLab) and maintain design documentation.
• Participate in specification and design reviews and mentor junior and senior engineers.

Requirements

Must-have technical skills, clearance, and experience to perform the role; preferred skills are listed after.

• Must-have: 8+ years of practical VHDL/Verilog FPGA design experience.
• Must-have: Expertise in clock domain crossing, timing analysis, synthesis flows, and revision control.
• Must-have: Experience with hardware-software integration and validation; familiarity with Linux tools and command line.
• Must-have: Familiarity with FPGA vendor tool flows and devices (Xilinx, Intel, Microchip, Lattice).
• Must-have: Knowledge of C and scripting languages (Perl, Tcl, Python) for test and automation.
• Must-have: Effective written and verbal communication, collaboration, and presentation skills.
• Must-have: U.S. Citizenship required and ability to obtain/maintain a U.S. DoD Secret clearance.
• Nice-to-have / Preferred: DSP knowledge, Matlab/Simulink architecture experience, Vivado and ModelSim/QuestaSim familiarity.
• Nice-to-have / Preferred: UVM/SystemVerilog experience, hardware debug skills, PCIe and other high-speed interface experience.
• Nice-to-have / Preferred: CI/CD workflows, deeper proficiency in C/C++, and experience with Xilinx/AMD and Microchip FPGA families and IP.
• Nice-to-have / Preferred: Previous aerospace design experience and active DoD Secret or Top Secret clearance.

Education Requirements

BS in Electrical Engineering or a related STEM field required (must be obtained by start date). No alternative degree or equivalent experience language was provided in the posting.

About the Company

Company: BAE Systems

Headquarters: London, United Kingdom

Global defense, aerospace and security company delivering products and services for air, land and naval forces, advanced electronics, cyber and intelligence solutions, and space and mission systems for government and commercial customers.