FPGA Design Engineer, Avionics & Air-Dominance

Job Title

FPGA Design Engineer, Avionics & Air-Dominance

Role Summary

Lead RTL development for high-performance avionics platforms within the Avionics & Air-Dominance team. Drive FPGA/SoC architecture, timing closure, and lab bring-up for mission-critical hardware.

Experience Level

Mid-level (typical 3–7 years). The posting does not state explicit years of experience.

Responsibilities

Primary responsibilities include:

• Design and implement RTL for FPGA/SoC platforms using VHDL or Verilog.
• Drive architecture decisions and timing-closure efforts to meet performance targets.
• Lead lab and board bring-up, debug, and hardware validation activities.
• Integrate and verify designs with hardware, software, and verification teams.
• Deliver solutions that meet mission-critical avionics reliability and timing requirements.

Requirements

Must-have qualifications:

• Hands-on FPGA/ASIC design experience.
• Strong VHDL or Verilog RTL coding skills.
• Experience with timing closure and FPGA/SoC implementation flows.
• Experience with lab bring-up, board-level debug, and hardware validation.
• Ability to collaborate across hardware, software, and verification teams.
• U.S. Secret clearance required.

Nice-to-have:

• Experience in avionics or other mission-critical systems.

Education Requirements

Not specified.

About the Company

Company: Anduril

Headquarters: Costa Mesa, CA, USA

Anduril is a defense technology company that builds autonomous systems, AI, sensor-fusion, and computer-vision-enabled platforms for U.S. and allied military and intelligence customers, powered by its Lattice OS to accelerate delivery of operational capabilities.