FPGA Design Engineer

Job Title

FPGA Design Engineer

Role Summary

The FPGA Design Engineer will lead design, development, and integration of FPGA-based embedded systems to support launch operations and test infrastructure. The role sits on a small cross-functional hardware, software, and systems team focused on high-performance data acquisition and processing for flight and test systems.

Work includes custom IP core design, high-speed interfaces, hardware/software integration, production-ready firmware, and participation in architecture and design reviews.

Experience Level

Mid-level. The posting requests 5+ years of hands-on FPGA development experience with AMD/Xilinx platforms and demonstrated ability to take designs from concept to production.

Responsibilities

Primary engineering duties and team interactions:

• Design, implement, and verify FPGA firmware for AMD/Xilinx systems, including SoC and ACAP architectures.
• Develop custom IP cores, register interfaces, interrupt logic, and DMA engines.
• Implement and optimize high-speed interfaces and streaming data paths (PCIe, Ethernet, SerDes).
• Perform timing analysis, CDC design, and validation using Vivado toolchains and hardware-in-the-loop testing.
• Collaborate with hardware and software engineers on board-level I/O, memory-mapped interfaces, and driver integration.
• Create and maintain design documentation, timing reports, test plans, and participate in design reviews and bring-up activities.

Requirements

Key must-have technical skills and constraints, plus relevant preferred skills.

• Must-have: 5+ years of hands-on FPGA development experience on AMD/Xilinx platforms (Vivado, Vitis), proficiency in HDL (VHDL and/or Verilog/SystemVerilog), timing constraints, IP integration, and build automation.
• Must-have: Strong understanding of digital design principles, timing analysis, CDC techniques, and debugging with Vivado ILA/VIO and lab equipment.
• Must-have: Experience with high-speed communication protocols and interfaces: PCIe (Gen1–Gen5), 1G/10G/25G Ethernet MAC/PHY, SerDes, and multi-gigabit transceivers.
• Must-have: Experience designing streaming DMA architectures, buffering strategies, flow control, and memory management for high-throughput data paths.
• Must-have: Strong collaboration and communication skills; proficiency with version control (Git) and CI/CD workflows for FPGA development.
• Must-have: US person status required (ITAR/EAR access).

• Nice-to-have: Experience with Versal ACAP, NoC requirements, AI Engine, Xilinx HLS, PetaLinux/embedded Linux, and video processing pipelines.
• Nice-to-have: Familiarity with functional verification tools and methodologies, Python/TCL scripting for automation, signal processing/DSP optimization, and power optimization techniques.
• Nice-to-have: Experience with board bring-up, hardware-in-the-loop testing, and driver-level register programming concepts.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field is required. A Master's degree in electrical engineering, computer engineering, or a related field is preferred.

About the Company

Company: Long Wall

Headquarters: Long Beach, CA, United States

Long Wall develops containerized, mass-producible missile defense and launch systems, offering rapid, low-cost flight testing to accelerate missile defense technology for the U.S. and allied partners. Founded in 2024, it builds on RS1 and GS0 launch systems.