FPGA Compiler (Router) Engineer

Job Title

FPGA Compiler (Router) Engineer

Role Summary

Join the FPGA compiler tools team to design and optimize routing algorithms in the compiler toolchain for next-generation FPGA devices. The work focuses on improving performance, routability, timing closure, and scalability for large designs.

Experience Level

Entry-level — requires approximately 1+ years of relevant experience in FPGA/ASIC design tools, EDA, or related fields.

Responsibilities

Key responsibilities involve implementing and integrating routing solutions within the compiler and addressing performance and convergence issues.

• Design, implement, and optimize FPGA routing algorithms to improve performance and routability.
• Contribute to compiler flow elements including placement, routing, and timing-driven optimization.
• Analyze and improve runtime, memory efficiency, and scalability for large designs.
• Collaborate with architecture, synthesis, timing (STA), and hardware teams to align routing strategies with device capabilities.
• Investigate routing congestion, timing violations, and design bottlenecks; develop solutions to improve convergence.
• Integrate routing features into existing compiler infrastructure and ensure robustness across customer use cases.

Requirements

Must-have technical skills and other requirements.

• 1+ years of experience in FPGA/ASIC design tools, EDA, or related fields.
• Strong background in algorithms and data structures, including graph algorithms and optimization techniques.
• Proficiency in C/C++ and software development best practices.
• Familiarity with routing algorithms (e.g., maze routing, negotiated congestion) and timing-driven design methodologies.
• Understanding of physical design concepts and timing closure workflows.
• Strong problem-solving skills and ability to deliver scalable, high-performance solutions.
• Effective communication and teamwork skills for cross-functional collaboration.
• Applicants must be eligible for any required Canada export authorizations.

Nice-to-have:

• Experience with commercial FPGA toolchains (Quartus, Vivado).
• Knowledge of FPGA architectures and interconnect fabrics.
• Familiarity with parallel/distributed computing for EDA workloads.
• Experience with scripting for tooling and automation (Python, Tcl).
• Background in timing analysis or placement algorithms.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.