FPGA Automation & Flow Optimization - Strategic Student Program (Internship)
SiemensJob Title
FPGA Automation & Flow Optimization - Strategic Student Program (Internship)
Role Summary
5–6 month student internship based in Meudon (Paris area), focused on accelerating FPGA implementation timelines by designing and automating parallel compilation flows using AMD Vivado Dynamic Function eXchange (DFX).
The intern will research compile-time reduction methods, build a synthetic benchmark, develop Tcl/Python automation to export isolated checkpoints and orchestrate parallel Vivado instances, and deliver performance analysis and documentation.
Experience Level
Entry-level internship (student). Suited for current engineering students; no professional years-of-experience required.
Responsibilities
Primary duties for the internship project.
- Survey academic and industry methods for reducing FPGA compile time and supporting modular compilation flows.
- Design and implement a synthetic benchmark to evaluate routing/timing overheads of modular implementations.
- Develop non-project-mode Tcl and Python automation to manage flow infrastructure, resolve module-boundary timing, and export isolated checkpoints.
- Implement a multiprocess execution harness to spawn concurrent Vivado instances for parallel compilation.
- Collect and analyze metrics (build time, RAM usage, timing closure) comparing monolithic and parallel DFX flows.
- Package the scripting framework in an internal repository and produce a final technical report.
Requirements
Must-have technical skills and abilities for successful internship execution. Education expectations are listed under Education Requirements.
- Must-have: Hands-on experience with AMD Vivado for synthesis and implementation.
- Must-have: Strong scripting in Tcl and/or Python and familiarity with running EDA tools from batch/command-line.
- Must-have: Proficiency in HDL (Verilog/SystemVerilog or VHDL), XDC constraints, and basic static timing analysis.
- Must-have: Fluent in French and English for team collaboration.
- Must-have: Ability to work both autonomously and collaboratively with mentors.
- Nice-to-have: Prior experience with Dynamic Function eXchange (DFX) or modular FPGA flows.
- Nice-to-have: Experience implementing parallel/multi-process orchestration and benchmarking EDA tool performance.
Education Requirements
Currently pursuing higher education in engineering (BAC+5 / Master's level) in France, focused on electrical engineering, computer engineering, computer science, or a closely related technical field. Enrollment as a student is required for this internship.
About the Company
Company: Siemens
Headquarters: Munich, Germany
Siemens EDA is a leading global provider of Electronic Design Automation (EDA) products and systems. Their innovative solutions enable companies to enhance the development of electronic products efficiently and effectively, keeping pace with the complex demands of technology and physics. Siemens is committed to delivering advanced workflow solutions that integrate both EDA and MCAD tools for multi-domain design and manufacturing in the semiconductor industry.
