Field Programmable Gate Array (FPGA) Engineer

Job Title

Field Programmable Gate Array (FPGA) Engineer

Role Summary

Design, implement, and optimize FPGA-based solutions for high-performance digital systems supporting the Hypersonics Projectiles Division at Naval Surface Warfare Center Dahlgren. Work on FPGA architecture, HDL implementation, verification, and system integration in collaboration with hardware, software, and systems teams.

Experience Level

Mid-level. Typical experience: 3–7 years in FPGA design and development.

Responsibilities

Key responsibilities include implementing FPGA designs, verifying functionality, and supporting system integration.

• Design and develop FPGA architectures for real-time and high-speed applications.
• Implement and optimize VHDL/Verilog code and use high-level synthesis as appropriate.
• Perform simulation, synthesis, static timing analysis, and timing closure activities.
• Develop and maintain testbenches for functional verification.
• Debug and validate designs using industry-standard tools and instrumentation.
• Support system integration, testing, troubleshooting, and documentation of designs and test results.
• Collaborate with cross-functional teams to integrate FPGA hardware with software and system components.
• Other duties as assigned related to project needs.

Requirements

Must-have technical skills, security, and physical capabilities.

• 3–7 years of hands-on FPGA design and development experience.
• Proficiency in HDL programming: VHDL and Verilog.
• Experience with FPGA development tools such as Vivado or Quartus.
• Strong understanding of digital logic design, high-speed interfaces, and embedded systems.
• Experience with hardware/software co-design and debugging tools (oscilloscope, JTAG, signal analyzer).
• Must currently hold a Secret-level security clearance; U.S. citizenship is required for this location.
• Ability to manage multiple projects in a fast-paced environment.
• Physical demands: able to lift up to 50 pounds, stand and walk for prolonged periods, and perform occasional twisting, bending, and squatting.

Nice-to-have

• Experience with Xilinx, Intel (Altera), or Lattice FPGA architectures.
• Familiarity with SystemVerilog, UVM, or high-level synthesis (HLS).
• Knowledge of C/C++ and Python for FPGA-related workflows.
• Background in signal processing, high-performance computing, or networking applications.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical field.

About the Company

Company: Bowhead

Headquarters: Huntsville, AL, United States

Bowhead provides engineering, professional, and technical services to government and commercial clients, supporting defense, intelligence, and civil programs with systems engineering, IT, and advanced technology solutions.