Experienced Verification Engineer

Role Overview

The Experienced Verification Engineer position is for a member of the GPU Hardware Team based in Cambridge. The candidate will utilize constrained-random simulation techniques using SystemVerilog/UVM or formal methods in their daily workflow. Responsibilities will include hands-on project work and collaboration with other verification specialists across Arm sites.

Work Experience Requirements

This position targets candidates with several years of experience designing verification environments for complex RTL systems. A strong grasp of hardware verification languages such as SystemVerilog or Specman ‘e’ based on UVM is essential, along with knowledge of HW IP verification processes and computer architecture fundamentals.

Job Duties

The responsibilities of this role include:

• Owning a specific GPU area, including development of testbenches at both unit and multi-unit levels.
• Producing test plans and verification strategies in response to proposed design changes.
• Planning, coordinating, and tracking individual tasks while ensuring quality goals are met.
• Proposing and executing innovative solutions and enhancements within the group.

Key Skills and Qualifications

Ideal candidates will possess the following skills:

• A successful track record in the RTL verification domain.
• Proficiency in hardware verification languages, especially SystemVerilog or Specman ‘e’.
• Familiarity with verification processes and computer architecture principles, particularly in relation to ARM systems.

Additional desirable attributes include proficiency in C/C++, Shell Scripting, Python, and experience with Jenkins, Git, and EDA tools.

Education Requirements

Applicants are expected to meet an educational standard that aligns with industry expectations for a verification engineer role, ideally holding a degree in Computer Engineering, Electrical Engineering, or a related field.