EVA Design Verification Engineer, Senior

Job Title

EVA Design Verification Engineer, Senior

Role Summary

As a senior verification engineer on the multimedia Computer Vision IP team, you will plan and execute verification and validation of computer vision hardware IP and multimedia subsystems for integration into SoCs. You will collaborate with architects, ASIC designers, software, firmware, modeling, emulation and post-silicon teams to define test methodology and deliver verified IP.

Experience Level

Senior - role title indicates senior level. Candidates typically have multi-year ASIC design and verification experience (see Education Requirements for degree-and-experience combinations).

Responsibilities

Primary responsibilities include:

• Architect, design and implement verification testbenches for computer vision IPs.
• Create and maintain SystemVerilog/UVM test environments and block-level testbenches.
• Collaborate with architecture, software, firmware, design, modeling, emulation and post-silicon teams to define verification strategy and content.
• Participate in micro-architecture reviews and define verification scope for features.
• Develop and execute directed tests, compliance suites and system-level scenarios; collect and analyze results.
• Build automation and continuous-integration flows for verification and testing.
• Produce technical documentation and feature descriptions.

Requirements

Must-have technical skills and experience:

• Practical experience with ASIC design and verification tools, techniques and methodology (multi-year experience preferred).
• Strong working knowledge of HVLs and verification languages: SystemVerilog and object-oriented programming; familiarity with Verilog and C/C++.
• Experience developing block-level testbenches and coverage-driven constrained-random verification.
• Familiarity with UVM or OVM and exposure to assertion-based formal verification.
• Scripting and automation skills in Python or Perl; experience with Tcl/shell scripting.
• Test planning, debug and problem-solving skills for multimedia hardware verification.

Nice-to-have:

• Experience with AMBA bus protocols (AXI/AHB/APB).
• Formal verification experience (assertion-based formal verification).

Education Requirements

Degree options: Bachelor's degree in Science, Engineering or related field plus 2+ years' relevant ASIC design/verification experience; OR Master's degree in Computer Science, Electrical Engineering, Computer Engineering or related field plus 1+ year of relevant experience; OR PhD in a related field. Applications with equivalent practical experience will be considered.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.