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Engineering IP Program Manager, Sr. Principal

Marvell Technology
September 28, 2026
Full-time
On-site
Santa Clara, California, United States
$173,280 - $259,600 USD yearly
Semiconductor IP Jobs, Level - Senior

Job Title

Engineering IP Program Manager, Sr. Principal

Role Summary

The Engineering IP Program Manager will lead program management for SoC IP development and delivery across Marvell’s product and custom silicon businesses. The role coordinates cross-functional engineering teams (analog, digital, DFT, layout, timing, validation, PnR) to deliver IP from conception through Mass Production Release (MPR).

Primary responsibilities are program planning, risk management, stakeholder communication, and ensuring IP meets product requirements and schedules.

Experience Level

Senior-level. The posting requests 10–15 years of related professional experience with a Bachelor's, or 5–10 years with a Master's/PhD. Candidates with 6+ years in semiconductor program management and 6+ years as a mixed-signal IP designer are preferred.

Responsibilities

Accountabilities include end-to-end IP program delivery, cross-functional coordination, and execution of program management processes.

  • Own program management for IP development and delivery to product business units through Mass Production Release (MPR).
  • Drive closure of IP specifications and requirements.
  • Chair weekly cross-functional meetings; assess status, milestones, and risks; provide regular updates to executive stakeholders.
  • Execute lessons learned, enforce agreed processes, and manage program risks.
  • Provide matrixed leadership of engineering program managers distributed across the organization.
  • Ensure successful technical, schedule, and quality outcomes for IP development.

Requirements

Essential technical skills and leadership abilities. (Degree and field details are in Education Requirements.)

  • Proven experience in IP or ASIC program management and delivery in semiconductor environments.
  • Demonstrated mixed-signal IP design experience and practical familiarity with analog and digital IP engineering activities (DFT, layout, timing, validation, PnR).
  • Strong knowledge of SoC/IC design flow, advanced process technologies, and silicon development methodologies.
  • Excellent verbal and written communication and presentation skills.
  • Ability to partner with technical managers and drive projects to completion; strong stakeholder management.
  • Demonstrated cross-functional leadership and excellent leadership skills.
  • Broad background in ASIC or other microelectronics development.
  • Nice-to-have: experience chairing executive-level reviews and implementing formal program management processes.

Education Requirements

BS in Electrical Engineering is listed; MSEE preferred. The posting specifies: a Bachelor’s degree in Computer Science, Electrical Engineering or related fields with 10–15 years of related professional experience, OR a Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5–10 years of experience.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-09-28