Embedded Systems and IP Engineer

Job Title

Embedded Systems and IP Engineer

Role Summary

Work within the Software, IP and Solutions (SIPS) organization to develop configurable FPGA soft IP and embedded solutions. Own features and subsystems across design and design verification from requirements and architecture through implementation, validation, documentation, and release.

The role spans hardware, firmware, drivers, and software boundaries and requires independent technical judgment, risk management, and cross-team coordination to deliver production-quality IP and embedded systems.

Experience Level

Senior - 7+ years of relevant experience in embedded systems, FPGA, RTL design, design verification, or a closely related engineering field.

Responsibilities

The role includes feature ownership across design, verification, delivery, and post-release support. Key responsibilities include:

• Translate system and customer requirements into architecture, technical specs, interfaces, and acceptance criteria.
• Design, implement, integrate, and debug synthesizable RTL using Verilog/SystemVerilog for FPGA soft IP and embedded subsystems.
• Produce and maintain registers, constraints, simulation models, design examples, and technical documentation.
• Integrate and configure IP using Quartus, Platform Designer, Visual Designer Studio, or equivalent FPGA flows.
• Support embedded-system bring-up and debug across FPGA fabric, HPS/Nios V, firmware, drivers, board interfaces, and customer applications.
• Own verification strategy and plans; develop/enhance SystemVerilog test benches, UVM or non‑UVM environments, BFMs, assertions, and functional coverage.
• Execute simulations, regressions, lint, CDC/RDC checks, synthesis, and timing analysis; analyze waveforms and logs to reproduce and root-cause failures.
• Lead defect triage, communicate verification status and risks, and drive issues to closure with cross-functional partners.
• Improve productivity via reusable scripts, automation, CI/CD, regression orchestration, and verification flow enhancements.
• Serve as technical lead or feature owner and mentor junior engineers and interns.

Requirements

Must-have technical skills and experience:

• 7+ years relevant experience in embedded systems, FPGA, RTL design, or design verification; equivalent demonstrated expertise may be considered.
• Strong understanding of digital design, computer architecture, embedded systems, FPGA architecture, and hardware/software interaction.
• Experience creating or maintaining verification environments and test content using SystemVerilog and UVM or equivalent methodologies.
• Hands-on experience with functional coverage, assertions, regression management, waveform analysis, and systematic failure triage.
• Proficiency in Python and/or other scripting languages; working knowledge of C or C++ for embedded or verification tasks.
• Experience with FPGA implementation and analysis flows such as Quartus or equivalent toolchains.
• Strong analytical, problem-solving, written, verbal, and cross-functional collaboration skills.

Nice-to-have:

• Familiarity with Platform Designer, Visual Designer Studio, CDC/RDC tools, and CI/CD automation for verification flows.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field; or equivalent demonstrated experience.

About the Company

Company: Altera

Headquarters: Bengaluru, Karnataka, India

Altera provides leadership programmable solutions for applications ranging from cloud to edge, unveiling limitless AI possibilities. Their extensive product portfolio includes FPGAs, CPLDs, Intellectual Property, development tools, and System on Modules aimed at accelerating innovation in various fields.