Job Title
Embedded FPGA Engineer
Role Summary
Design, implement, and validate FPGA-based digital signal processing (DSP) systems for embedded SOSA/VPX platforms. Work with cross-functional teams to integrate FPGA designs with firmware and software, optimize performance for real-time constraints, and produce reusable hardware IP.
This role supports RF signal-processing applications on modern FPGA toolchains and requires independent, self-guided engineers who collaborate effectively in multidisciplinary teams.
Experience Level
Mid-level — requires 3+ years of relevant FPGA or SDR development experience.
Responsibilities
Primary responsibilities include designing, implementing, testing, and optimizing FPGA/DSP systems for embedded platforms.
- Design and implement FPGA-based DSP systems using HDL, Vitis HLS, and modern toolchains.
- Translate DSP algorithms (filtering, detection, synchronization, modulation/demodulation, transforms) into high-throughput, resource-efficient hardware blocks.
- Integrate FPGA designs with software, firmware, and system architectures in cross-functional teams.
- Test, verify, and validate designs to meet functional correctness and real-time performance targets.
- Optimize timing, area, power, and throughput using HLS directives and FPGA workflows.
- Develop reusable hardware IP blocks and document designs (block diagrams, interface definitions, user guides).
- Maintain lab validation including use of logic analyzers, oscilloscopes, and spectrum analyzers.
- Evaluate and recommend techniques and tools to improve FPGA development efficiency.
Requirements
Must-have technical skills, tools, and clearances followed by optional strengths that are desirable.
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Must-have: 3+ years developing FPGA or SDR solutions.
- Proficiency with HDL (Verilog, VHDL, SystemVerilog) and HLS (Vitis HLS); experience with Xilinx toolchains (Vitis, Vivado) and scripting (Tcl).
- Experience with simulation, synthesis, implementation, timing analysis, and debug flows.
- Proficiency with Python and/or C++ and familiarity with MATLAB for DSP modeling.
- Experience in Linux/UNIX development environments and scripting.
- Knowledge of digital design fundamentals: streaming architectures, pipelining, buffering, and datapath timing.
- Ability to read hardware schematics and operate lab equipment for hardware validation.
- Ability to obtain TS/SCI clearance (applicants will be subject to security investigation).
Nice-to-have:
- Experience implementing or prototyping DSP algorithms in hardware and developing HLS-friendly algorithms.
- Experience with SOSA/VPX systems and porting vendor RF transceiver reference designs to evaluation boards or custom platforms.
- RF testing experience and familiarity with high-speed digital interfaces (AXI-Stream, AXI-Lite, DMA).
- Experience with GPU acceleration, parallel computing, or high-bandwidth data processing.
- Experience shaping development roadmaps, supporting Agile workflows (Jira, Confluence), or using AI-driven automation for FPGA design and verification.
Education Requirements
Required: Bachelor’s degree in Electrical Engineering or Computer Engineering. Preferred: Master’s degree in Electrical Engineering, Computer Engineering, or a related field. (Education requirements were stated explicitly in the source.)
About the Company
Company: Booz Allen & Hamilton
Headquarters: McLean, Virginia, United States
Management and technology consulting firm providing analytics, engineering, cyber, digital, and mission services to U.S. government agencies (especially defense and intelligence) and commercial clients.

Date Posted: 2026-07-31