Electro-Optic Link Hardware Engineer

Job Title

Electro-Optic Link Hardware Engineer

Role Summary

Lead hands-on verification and characterization of high-speed electro-optic links across silicon and system programs. Work at the bench to develop modeling methodology, measurement standards, and resolve complex signal integrity and link-performance issues.

Position is based in Boston, MA or Mountain View, CA with a flexible hybrid workplace model.

Experience Level

Senior - typically 8+ years (MS/PhD) or 10+ years (BS/MS) of relevant experience; expected to own verification strategy for a full silicon/system program.

Responsibilities

Hands-on lab and system responsibilities for link verification and debugging.

• Perform lab characterization and debug of high-speed electrical/optical hardware, including novel failure modes.
• Build and validate system-level electrical/optical/EO channel models; correlate models with bench measurements.
• Own link budget and verification methodology and execute validating measurements.
• Characterize eye diagrams, BER, jitter, equalization, and channel impairments.
• Support silicon bring-up and root-cause analysis with analog, package, PCB, and SerDes teams.
• Influence chip/package/system architecture tradeoffs based on bench findings.
• Mentor senior and staff engineers while remaining hands-on in the lab.
• Develop automation and tools to accelerate characterization and testing.

Requirements

Key technical skills and experience required; preferred qualifications listed below.

• Ownership of verification strategy for a full silicon/system program.
• Deep expertise with high-speed serial links (56G/112G/224G+), SerDes equalization (CTLE/FFE/DFE), and signal integrity (S-parameters, crosstalk, link budgets).
• Proven hands-on lab experience leading investigations and resolving difficult hardware issues.
• Proficient in Python or MATLAB for team automation and test frameworks.
• Experience using VNA, oscilloscopes, BERTs, TDRs, and related lab equipment.
• Familiarity with simulation and design tools such as ADS, HFSS, Cadence, and COMSOL.
• Track record mentoring engineers and collaborating across analog, package, PCB, and SerDes teams.
• Ability to comply with U.S. export control laws and related requirements.

Preferred / Nice-to-have:

• Architecture-level experience with silicon photonics and EO systems.
• Package/PCB/channel co-design ownership.
• COM/IBIS-AMI modeling experience, patents, or contributions to standards (OIF, IEEE 802.3).

Education Requirements

Preferred: MS or PhD in Electrical Engineering, Photonics, or Physics (posting indicates MS/PhD candidates typically with ~8+ years experience). Alternative listed: BS or MS with ~10+ years experience. No specific certifications were listed.

About the Company

Company: Lightmatter

Headquarters: Boston, Massachusetts, USA

Lightmatter develops photonic AI data-center infrastructure and optical chips for extreme-scale AI and HPC. The company invented the Passage 3D‑stacked photonics engine to provide high-bandwidth, low-latency interconnects across large-scale processors and raised $400M in Series D financing at a reported $4.4B valuation.