EDA Flow and Logic Synthesis Engineer

Job Title

EDA Flow and Logic Synthesis Engineer

Role Summary

Work on mid-end flows that convert RTL into implementation-ready inputs for physical design. The role focuses on building and maintaining synthesis/DFT/static/formal/power flows, automation, dashboards, and quality gates for complex soft IP.

Collaborate with RTL designers, verification, DFT, physical design, methodology, and tooling teams to improve flow robustness, debug failures, and accelerate delivery using automation and AI techniques.

Experience Level

Mid-level - typically 5+ years of relevant ASIC/mid-end engineering experience or equivalent project work.

Responsibilities

Key responsibilities include developing and supporting mid-end flows, automating processes, and debugging cross-domain issues.

• Develop, run, and maintain mid-end flows for synthesis, DFT, static checking, formal equivalence, power analysis, and quality gates.
• Convert RTL outputs into clean, constrained, implementation-ready inputs for physical design.
• Build and maintain Tcl-based automation, dashboards, and project infrastructure; apply AI to speed triage and script development.
• Analyze flow failures, isolate root causes, and drive resolution with design, verification, DFT, and implementation teams.
• Improve documentation, handoff criteria, and reusable collateral to ensure consistent execution across IP programs.

Requirements

Must-have technical skills and experience; followed by concise nice-to-have items.

• Practical experience with ASIC design, verification, and mid-end development flows (experience level noted above).
• Hands-on synthesis experience and ability to analyze and resolve synthesis issues.
• Strong Tcl scripting skills and an automation-first mindset.
• Familiarity with at least two of: DFT concepts, static checking (SpyGlass or equivalent), formal equivalence (e.g., Formality), or power analysis.
• Ability to use AI tools effectively for debugging, summarizing results, and improving scripts/flows.
• Strong analytical, problem-solving, communication, and documentation skills.

• Nice-to-have: Experience across the full mid-end set (DFT, SpyGlass, Formality, power analysis), IP packaging and reusable delivery collateral, and hands-on experience with Synopsys tools such as Fusion Compiler and VC SpyGlass.

Education Requirements

BS or MS in Electrical Engineering, Computer Engineering, or a related technical field - or equivalent practical experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.