DRAM Verification Engineer - Staff to Senior Staff

Job Title

DRAM Verification Engineer - Staff to Senior Staff

Role Summary

Join Qualcomm's Custom Memory and STCO team to develop and verify next-generation custom DRAM and memory subsystem solutions. The role partners with architecture, design, and silicon validation teams to ensure functional correctness, performance, and verification closure for memory IP and subsystems.

Experience Level

Senior level. Typical experience expectations: Bachelor's +6 years, Master's +5 years, or PhD +4 years of relevant ASIC design/verification/validation/integration experience.

Responsibilities

Primary responsibilities focus on developing verification environments and driving verification to closure for DRAM and memory subsystems.

• Develop SystemVerilog/UVM verification environments for DRAM and memory subsystems.
• Create verification plans, constrained-random tests, checkers, scoreboards, SVA assertions, and functional coverage.
• Verify DRAM functionality: read/write, refresh, mode registers, initialization, training, timing, and low-power states.
• Verify memory controller/DRAM interfaces and complex protocol/timing interactions.
• Drive functional, code, and assertion coverage to closure.
• Debug RTL and gate-level simulation failures; support SDF/GLS verification.
• Collaborate with design, architecture, and silicon teams to reproduce and root-cause pre- and post-silicon issues.

Requirements

Must-have technical skills and verification experience. Preferred skills listed separately.

• Must-have: Hands-on experience with SystemVerilog and UVM; strong understanding of digital design and verification methodologies.
• Experience with simulation, debugging, assertions, and coverage-driven verification.
• Proven ability to identify coverage gaps, debug complex failures, and drive issues to closure.
• Experience debugging RTL and gate-level simulations and supporting SDF/GLS flows.
• Good communication and teamwork skills; able to coordinate across architecture, design, and silicon teams.

• Nice-to-have: Experience with DRAM, DDR, LPDDR, HBM, or custom memory architectures; knowledge of DRAM commands, timing, training, refresh, and power management.
• Experience with SVA, formal verification, CDC/RDC, low-power verification.
• Scripting experience (Python, Perl, Tcl, shell) for automation and debug.

Education Requirements

Degree required: Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. Equivalency options: Bachelor's +6 years relevant experience, Master's +5 years, or PhD +4 years in ASIC design, verification, validation, integration, or related work.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.