DRAM Technology Sr. Layout Design Engineer

Job Title

DRAM Technology Sr. Layout Design Engineer

Role Summary

Translate circuit schematics into manufacturable DRAM layouts and support tape-out activities for assigned DRAM products. Work within the DRAM Engineering Group (DEG) and with global design, CAD, and process teams to meet design, process, and reliability requirements.

Deliver layout solutions, verify physical correctness, and communicate technical progress to stakeholders across worldwide teams.

Experience Level

Senior - senior-level position (title indicates seniority). Years of experience not specified.

Responsibilities

Core responsibilities focused on layout development, verification, and team interaction.

• Develop and optimize IP and product layouts for DRAM while ensuring compliance with design, process, and reliability targets.
• Perform physical verification tasks (DRC, LVS, EM), parasitic and IR analyses, and produce quality reviews and documentation for tape-out.
• Collaborate with circuit designers, CAD, and cross-functional engineering teams to resolve layout challenges.
• Mentor and guide team members through layout reviews, knowledge sharing, and technical problem-solving.
• Plan and present layout strategies, status, and results to stakeholders across global teams.

Requirements

Key technical skills and experience required and preferred for the role.

Must-have:

• Experience creating custom layout designs in advanced CMOS technologies and applying physical verification methodologies.
• Strong understanding of layout fundamentals: electromigration, IR drop, latch-up, parasitic extraction, matching, shielding, coupling, and crosstalk effects.
• Proficiency with Cadence Virtuoso and physical verification tools such as Mentor Calibre.
• Demonstrated problem-solving in area optimization, power, performance, and layout quality.
• Ability to collaborate effectively with circuit designers, CAD teams, and cross-functional engineering partners.

Nice-to-have:

• Experience with layout automation, scripting or SKILL programming to improve efficiency.
• Understanding of how physical layout impacts speed, power, capacitance, and area.
• Experience supporting global engineering teams and improving productivity/turnaround.
• Experience leveraging AI-assisted tools to enhance workflow efficiency.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, VLSI Engineering, Mechatronics, or a related field (degree required as stated: Bachelor's or Master's).

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.