DMA Designer (up to Staff)
QualcommJob Title
DMA Designer (up to Staff)
Role Summary
Join Qualcomm's SoC design team to architect and implement DRAM access pipelines, arbitration, bandwidth governance and QoS for high-performance image and video processing. The role partners with ISP/Video architects, NoC/interconnect and memory controller teams to deliver deterministic latency and efficient DRAM utilization for multimedia workloads.
Experience Level
Senior-level. The posting defines degree-based experience minima (see Education Requirements); otherwise the role expects significant hands-on SoC DRAM and multimedia design experience and demonstrated ownership from modeling through silicon validation.
Responsibilities
Primary technical responsibilities include:
- Architect DRAM access pipelines for ISP and video: scheduling, burst shaping, buffering, and scalable multi-stream support.
- Design and optimize arbitration and QoS mechanisms (priority, aging, credit/token, fairness, deadline/urgency) to meet real-time imaging/video latency targets.
- Develop performance and traffic models (SystemC/C++/Python/C) to evaluate bandwidth, latency, utilization, and arbitration strategies under representative workloads.
- Collaborate with ISP/Video architecture, NoC/interconnect, and memory controller teams to align dataflows, budgets, and runtime QoS policies.
- Support verification and post-silicon validation: DRAM trace analysis, bandwidth/latency profiling, QoS tuning, debugging, and performance documentation.
Requirements
Must-have technical skills and experience:
- Strong understanding of DRAM systems (LPDDR4/5), memory controller scheduling, row/bank/refresh behavior, and SoC memory hierarchy.
- Solid knowledge of ISP and video dataflow patterns (RAW/YUV access, multi-frame fusion, motion/ME pipelines, reference frames).
- Proficiency in RTL microarchitecture and performance modeling using SystemVerilog, SystemC, C++, and/or Python.
- Experience analyzing bandwidth, latency, utilization, and backpressure effects in complex SoC environments.
- Proven ability to drive designs from concept through modeling, implementation, and silicon validation.
- Preferred: experience with DRAM access design for ISP/video pipelines (HDR, noise reduction, rotation/warp, encoder/decoder), NoC/MC arbitration and QoS tuning, system-level bandwidth planning, and post-silicon performance profiling.
- Preferred: strong cross-team communication and collaboration skills.
Education Requirements
Degree/experience combinations stated in the posting: Bachelor's degree in Science, Engineering or related field plus 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science or related field plus 1+ year of relevant experience; OR PhD in a related field. Equivalent practical experience is implied by the degree-based alternatives.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
