Distinguished Engineer (DE) or Senior Director, Central Engineering – SoC Design & Modeling Methodologies

Job Title

Distinguished Engineer (DE) or Senior Director, Central Engineering – SoC Design & Modeling Methodologies

Role Summary

Lead workload and performance analysis, hardware/software co-design (including AI workloads), and SoC architecture across multiple product lines. Drive modeling methodologies, performance and power tradeoffs, and design enablement to accelerate reuse and platform development.

Partner with product groups, platform teams, and executive leadership to define system-level requirements and co-optimize hardware and software for target workloads.

Experience Level

Senior - typically requires 15+ years in semiconductor or SoC development and 8+ years of technical leadership.

Responsibilities

Accountable for technical strategy, execution, and team leadership in SoC performance and workload analysis.

• Define and drive the strategic roadmap for workload and performance analysis for IPs and products.
• Lead architecture and performance reviews for complex IP, subsystems, and SoCs.
• Establish best practices for hardware/software co-design and model-based development.
• Define and analyze AI workloads and their performance requirements.
• Conduct workload characterization, performance and power tradeoff analysis, and solution integration.
• Develop advanced SoC architecture, performance modeling methodologies, and design enablement strategies.
• Provide technical leadership across architecture, design, verification, emulation, and software teams.
• Build and mentor high-performing engineering teams, including directors and principal engineers.
• Collaborate with product groups, platform teams, and external partners to influence long-term platform strategy.

Requirements

Must-have technical expertise and leadership experience to execute the responsibilities above.

• 15+ years in semiconductor or SoC development with proven technical leadership (8+ years).
• Deep expertise in performance analysis, workload analysis, AI workloads, and SoC architecture and integration.
• Hands-on experience with performance and workload benchmarking, virtual platforms, and SoC performance modeling.
• Experience with digital design methodologies, IP/subsystem development, and hardware/software co-design.
• Familiarity with SoC verification methodologies and design/verification automation flows.
• Proven ability to lead cross-functional teams and influence product and platform strategy.
• Strong communication and mentoring skills.

Education Requirements

MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline. PhD highly desired.

About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.