Display IP System Engineer

Role Summary

The AMD Computing and Graphics IP Systems Engineering Team is looking for an IP Systems Engineer. This role involves driving planning, verification, and debugging of various Display Controller Next (DCN) hardware IP for upcoming AMD APU & dGPU SoC programs.

Experience Level

Level - Mid-Career

Responsibilities

• Define and execute the overall functional test plan and verification strategy for the AMD DCN IP.
• Drive technical innovation to enhance AMD's capabilities in DCN IP validation/verification.
• Debug DCN IP issues during pre-silicon, bringup, validation, and production phases of SoC programs.
• Collaborate with design, diagnostics, emulation, firmware, and driver teams to ensure readiness for first silicon arrival and enablement of DCN IP functionality.
• Engage in pre-silicon verification efforts including FPGA-based emulation and Design Verification.
• Lead collaborative technical discussions to resolve technical issues.
• Develop knowledge of system architecture/debug and other IPs.
• Support issues on customer platforms as requested by customer support teams.

Requirements

• Proven experience in digital logic/platform design, verification, or post-silicon verification.
• Strong programming/scripting skills (C/C++, Perl, Ruby, Python).
• Experience with ASIC debug techniques and methodologies.
• Familiarity with common lab equipment including protocol/logic analyzers and oscilloscopes.
• Experience with board/platform-level debug including power delivery and sequencing.
• Knowledge of high-speed interface physical and protocol levels is an asset.
• In-depth knowledge of PC architectures is a plus.
• Excellent written and verbal communication skills.
• Ability to work flexibly and independently.
• Leadership and mentoring skills are beneficial.

Education Requirements

Bachelor's or Master's degree in Electrical or Computer Engineering.